Patents by Inventor Sergio ALDEA LOPEZ

Sergio ALDEA LOPEZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210081842
    Abstract: A server system may receive two or more Quality of Service (QoS) dimensions for the multi-objective optimization model, wherein the two or more QoS dimensions include at least a first QoS dimension and a second QoS dimension. The server system may maximize the multi-objective optimization model along the first QoS dimension, wherein the maximizing includes selecting one or more pipelines for the multi-objective optimization model in the software architecture that meet QoS expectations specified for the first QoS dimension and the second QoS dimension, wherein an ordering of the pipelines is dependent on which QoS dimensions were optimized and de-optimized and to what extent, wherein the multi-objective optimization model is partially de-optimized along the second QoS dimension in order to comply with the QoS expectations for the first QoS dimension, and whereby there is a tradeoff between the first QoS dimension and the second QoS dimension.
    Type: Application
    Filed: September 12, 2020
    Publication date: March 18, 2021
    Applicant: Oracle International Corporation
    Inventors: Alberto Polleri, Sergio Aldea Lopez, Marc Michiel Bron, Dan David Golding, Alexander Ioannides, Maria del Rosario Mestre, Hugo Alexandre Pereira Monteiro, Oleg Gennadievich Shevelev, Larissa Cristina Dos Santos Romualdo Suzuki, Xiaoxue Zhao, Matthew Charles Rowe
  • Publication number: 20210083855
    Abstract: The present disclosure relates to systems and methods for a machine-learning platform for the safe serialization of a machine-learning application. Individual library components (e.g., a pipeline, a microservice routine, a software module, and an infrastructure model) can be encrypted using one or more keys. The keys can be stored in a location different from the storage location of the machine-learning application. Prior to incorporation of the library component into a machine-learning model, one or more keys can be retrieved from the remote storage location to authenticate that the one or more encrypted library components are authentic. The process can reject any of the one or more component, when the encrypted library component fails authentication. If a component is rejected, the system can roll back to a previous, authenticated version of the library component. The authenticated library components can be compiled into machine-learning software.
    Type: Application
    Filed: September 12, 2020
    Publication date: March 18, 2021
    Applicant: Oracle International Corporation
    Inventors: Alberto Polleri, Sergio Aldea Lopez, Marc Michiel Bron, Dan David Golding, Alexander Ioannides, Maria del Rosario Mestre, Hugo Alexandre Pereira Monteiro, Oleg Gennadievich Shevelev, Larissa Cristina Dos Santos Romualdo Suzuki, Xiaoxue Zhao, Matthew Charles Rowe
  • Patent number: 10949378
    Abstract: A checkpointing mechanism by which in-memory data structures are copied from computation nodes (200) to staging nodes (700) by using RDMA, checkpoints are made and kept in memory in the staging node (700), and then asynchronously copied to non-volatile storage (150). In contrast to previous approaches, checkpoints remain in volatile memory (740) as part of the checkpointing mechanism. As a result, recovery from checkpoint is potentially faster, since the required checkpoint may be already in memory (740) in the staging node (700). An automatic and customisable mechanism is provided to control when the checkpointing process is triggered. As an alternative to copying an object through the network, the object in memory can be updated to a newer version of the object by applying the chain of changes made in the object in the corresponding computation node (200).
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: March 16, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Sergio Aldea Lopez
  • Publication number: 20200125933
    Abstract: A computer-implemented method in a computing network of a number of processing nodes 1 to X, in the computing network neurons of a Convolutional Neural Network (CNN) are divided between the number of nodes. The method including allocating a mini-batch of input data from among mini-batches of input data to a node of the nodes; splitting the mini-batch into a number of mini-batch sections X corresponding and equal to the number of nodes; at the node retaining a mini-batch section which has a same number as the node and sending other mini-batch sections of the split mini-batch sections to corresponding other nodes according to a number of the split mini-batch sections; collating at the node the split mini-batch sections at the node into a single matrix and multiplying the collated matrix by the neurons to provide output data sections having one section of output data per each mini-batch.
    Type: Application
    Filed: October 11, 2019
    Publication date: April 23, 2020
    Applicant: FUJITSU LIMITED
    Inventor: Sergio ALDEA LOPEZ
  • Patent number: 10338956
    Abstract: An application profiling system, initiating profiling a software application; including: apparatus to receive user input information of a software application profiling target and execution requirements, to store profiler specifications; to determine which profiler satisfies the execution requirements, based on the specifications, and to generate needed profiling tasks, each task specifying an application profiler; to select hardware resources the tasks; and to initiate execution of the tasks.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: July 2, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Ahmed Al-Jarro, Sergio Aldea Lopez
  • Publication number: 20190188570
    Abstract: The method according to an embodiment comprises automatically controlling allocation, to memories of available hardware resources, of parameters defining computational operations required to calculate an output of at least one layer of neurons of an artificial neural network. The allocation is controlled on the basis of previously-defined allocation data specifying how the operations required to calculate the output of the one layer of neurons are to be allocated to hardware resources to perform the operations.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 20, 2019
    Applicant: FUJITSU LIMITED
    Inventor: Sergio ALDEA LOPEZ
  • Publication number: 20180046497
    Abstract: An application profiling system, initiating profiling a software application; including: apparatus to receive user input information of a software application profiling target and execution requirements, to store profiler specifications; to determine which profiler satisfies the execution requirements, based on the specifications, and to generate needed profiling tasks, each task specifying an application profiler; to select hardware resources the tasks; and to initiate execution of the tasks.
    Type: Application
    Filed: June 30, 2017
    Publication date: February 15, 2018
    Applicant: Fujitsu Limited
    Inventors: Ahmed AL-JARRO, Sergio ALDEA LOPEZ
  • Publication number: 20180032320
    Abstract: A computer-implemented method for allowing modification of a region of original code of a computer program, the method comprising: annotating a region of original code for extraction with a compiler directive; and compiling code including the original code and the compiler directive, wherein the compiler directive causes the annotated region of the original code to be extracted, stored in a separate file, and linked to a function call at a position in the original code from which the extracted region was extracted; and wherein the compiler instruments the remaining original code to allow starting and ending working sets to be saved.
    Type: Application
    Filed: February 28, 2017
    Publication date: February 1, 2018
    Applicant: Fujitsu Limited
    Inventor: Sergio ALDEA LOPEZ
  • Publication number: 20170344564
    Abstract: A checkpointing mechanism by which in-memory data structures are copied from computation nodes (200) to staging nodes (700) by using RDMA, checkpoints are made and kept in memory in the staging node (700), and then asynchronously copied to non-volatile storage (150). In contrast to previous approaches, checkpoints remain in volatile memory (740) as part of the checkpointing mechanism. As a result, recovery from checkpoint is potentially faster, since the required checkpoint may be already in memory (740) in the staging node (700). An automatic and customisable mechanism is provided to control when the checkpointing process is triggered. As an alternative to copying an object through the network, the object in memory can be updated to a newer version of the object by applying the chain of changes made in the object in the corresponding computation node (200).
    Type: Application
    Filed: March 9, 2017
    Publication date: November 30, 2017
    Applicant: Fujitsu Limited
    Inventor: Sergio ALDEA LOPEZ