Patents by Inventor Sergio Boixo Castrillo
Sergio Boixo Castrillo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240095561Abstract: Methods, systems and apparatus for implementing a quantum gate on a quantum system comprising a second qubit coupled to a first qubit and a third qubit. In one aspect, a method includes evolving a state of the quantum system for a predetermined time, wherein during evolving: the ground and first excited state of the second qubit are separated by a first energy gap ?; the first and second excited state of the second qubit are separated by a second energy gap equal to a first multiple of ? minus qubit anharmoniticity ?; the ground and first excited state of the first qubit and third qubit are separated by a third energy gap equal to ???; and the first and second excited state of the first qubit and third qubit are separated by a fourth energy gap equal to the first multiple of the ? minus a second multiple of ?.Type: ApplicationFiled: October 4, 2023Publication date: March 21, 2024Inventors: Yuezhen NIU, Vadim SMELYANSKIY, Sergio BOIXO CASTRILLO
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Patent number: 11928586Abstract: Methods, systems, and apparatus for designing a quantum control trajectory for implementing a quantum gate using quantum hardware. In one aspect, a method includes the actions of representing the quantum gate as a sequence of control actions and applying a reinforcement learning model to iteratively adjust each control action in the sequence of control actions to determine a quantum control trajectory that implements the quantum gate and reduces leakage, infidelity and total runtime of the quantum gate to improve its robustness of performance against control noise during the iterative adjustments.Type: GrantFiled: January 31, 2018Date of Patent: March 12, 2024Assignee: Google LLCInventors: Yuezhen Niu, Hartmut Neven, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Patent number: 11809957Abstract: Methods, systems and apparatus for implementing a quantum gate on a quantum system comprising a second qubit coupled to a first qubit and a third qubit. In one aspect, a method includes evolving a state of the quantum system for a predetermined time, wherein during evolving: the ground and first excited state of the second qubit are separated by a first energy gap ?; the first and second excited state of the second qubit are separated by a second energy gap equal to a first multiple of ? minus qubit anharmoniticity?; the ground and first excited state of the first qubit and third qubit are separated by a third energy gap equal to ??; and the first and second excited state of the first qubit and third qubit are separated by a fourth energy gap equal to the first multiple of the ? minus a second multiple of .Type: GrantFiled: January 31, 2019Date of Patent: November 7, 2023Assignee: Google LLCInventors: Yuezhen Niu, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Publication number: 20230274172Abstract: Methods, systems, and apparatus for implementing a unitary quantum gate on one or more qubits. In one aspect, a method includes the actions designing a control pulse for the unitary quantum gate, comprising: defining a universal quantum control cost function, wherein the control cost function comprises a qubit leakage penalty term representing i) coherent qubit leakage, and ii) incoherent qubit leakage across all frequency components during a time dependent Hamiltonian evolution that realizes the unitary quantum gate; adjusting parameters of the time dependent Hamiltonian evolution to vary a control cost according to the control cost function such that leakage errors are reduced; generating the control pulse using the adjusted parameters; and applying the control pulse to the one or more qubits to implement the unitary quantum gate.Type: ApplicationFiled: May 3, 2023Publication date: August 31, 2023Inventors: Yuezhen Niu, Hartmut Niu, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Patent number: 11657315Abstract: Methods, systems, and apparatus for implementing a unitary quantum gate on one or more qubits. In one aspect, a method includes the actions designing a control pulse for the unitary quantum gate, comprising: defining a universal quantum control cost function, wherein the control cost function comprises a qubit leakage penalty term representing i) coherent qubit leakage, and ii) incoherent qubit leakage across all frequency components during a time dependent Hamiltonian evolution that realizes the unitary quantum gate; adjusting parameters of the time dependent Hamiltonian evolution to vary a control cost according to the control cost function such that leakage errors are reduced; generating the control pulse using the adjusted parameters; and applying the control pulse to the one or more qubits to implement the unitary quantum gate.Type: GrantFiled: June 4, 2021Date of Patent: May 23, 2023Assignee: Google LLCInventors: Yuezhen Niu, Hartmut Neven, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Publication number: 20230118636Abstract: Methods, systems and apparatus for simulating quantum circuits including multiple quantum logic gates. In one aspect, a method includes the actions of representing the multiple quantum logic gates as functions of one or more classical Boolean variables that define a undirected graphical model with each classical Boolean variable representing a vertex in the model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions. The calculated partition function is used to (i) calibrate, (ii) validate, or (iii) benchmark quantum computing hardware implementing a quantum circuit.Type: ApplicationFiled: December 13, 2022Publication date: April 20, 2023Inventors: Sergio Boixo Castrillo, Vadim Smelyanskiy
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Patent number: 11556686Abstract: Methods, systems and apparatus for simulating quantum circuits including multiple quantum logic gates. In one aspect, a method includes the actions of representing the multiple quantum logic gates as functions of one or more classical Boolean variables that define a undirected graphical model with each classical Boolean variable representing a vertex in the model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions. The calculated partition function is used to (i) calibrate, (ii) validate, or (iii) benchmark quantum computing hardware implementing a quantum circuit.Type: GrantFiled: December 18, 2017Date of Patent: January 17, 2023Assignee: Google LLCInventors: Sergio Boixo Castrillo, Vadim Smelyanskiy
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Publication number: 20220414519Abstract: Systems and methods for quantum error mitigation are provided. A method can include accessing a quantum system; implementing a plurality of quantum circuits; obtaining a plurality of measurements performed for each of the quantum circuits; determining an estimated average value of an observable of interest (O)f for the quantum circuits based at least in part on the plurality of measurements; and determining an estimated noiseless value of an observable of interest (O)? based at least in part on the estimated average value of the observable of interest (O)f using a single-point full depolarizing error model. Each of the plurality of quantum circuits can be implemented by a different sequence of quantum gates as compared to each of the other quantum circuits in the plurality to thereby implement one or more circuit gauges and can be an equivalent logical operation as each of the other quantum circuits in the plurality.Type: ApplicationFiled: November 16, 2020Publication date: December 29, 2022Inventors: Jarrod Ryan McClean, Sergio Boixo Castrillo, Craig Gidney, Vadim Smelyanskiy
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Publication number: 20220383180Abstract: Methods, systems and apparatus for estimating quantum processor performance. In one aspect, a method includes defining a benchmarking circuit configured to operate on an array of qubits, wherein the benchmarking circuit comprises one or more cycles of quantum gates, each cycle comprising a respective layer of randomly sampled single-qubit gates and a layer of multiple instances of a same multi-qubit gate; partitioning the defined benchmarking circuit into two or more sub-circuits, comprising: defining one or more boundaries between qubits in the array of qubits, removing instances of the multi-qubit gate that cross the defined one or more boundaries to create the two or more sub-circuits; performing a benchmarking process using the partitioned benchmarking circuit to estimate a respective circuit fidelity of each of the sub-circuits; and multiplying the estimated circuit fidelities of each of the sub-circuits to obtain an estimate of the fidelity of the quantum processor.Type: ApplicationFiled: October 23, 2019Publication date: December 1, 2022Inventors: Sergio Boixo Castrillo, Craig Gidney, Adam Zalcman
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Publication number: 20220374750Abstract: Methods, systems and apparatus for estimating the fidelity of a quantum computing system. In one aspect, a method includes defining one or more random quantum circuits, wherein a noisy experimental implementation of each random quantum circuit is approximated by a depolarizing channel with respective polarization parameter; generating, for each defined random quantum circuit and by the quantum computing system, a set of experimental data, wherein data items in the set of experimental data comprise measured bit strings corresponding to experimental implementations of the random quantum circuit; determining, for each of the one or more random quantum circuits, an estimate of the respective polarization parameter, comprising maximizing a log-likelihood of the polarization parameter conditioned on the respective set of experimental data using series inversion; and determining an estimate of the fidelity of the quantum computing system based on the determined estimates of respective polarization parameters.Type: ApplicationFiled: October 25, 2019Publication date: November 24, 2022Inventors: Vadim Smelyanskiy, Alexander Korotkov, Sergio Boixo Castrillo
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Publication number: 20220269973Abstract: Methods, systems and apparatus for measuring quantum state purity. In one aspect, a method for determining an average purity of multiple output quantum states, wherein the multiple output quantum states correspond to applications of respective random quantum circuits of a same circuit depth to a same initial quantum state, the method including: obtaining a plurality of data items, wherein each data item corresponds to a respective random quantum circuit of the same circuit depth and represents a probability that application of the respective random quantum circuit to the initial quantum state produces a respective measurement result; calculating a variance of a plurality of data items; determining a Porter-Thomas distribution having a dimension equal to a dimension of each output quantum state; and dividing the calculated variance by a variance of the Porter-Thomas distribution to determine the average purity.Type: ApplicationFiled: October 24, 2019Publication date: August 25, 2022Inventors: Julian Shaw Kelly, Zijun Chen, Sergio Boixo Castrillo
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Publication number: 20220230087Abstract: Methods, systems and apparatus for estimating the fidelity of quantum logic gates. In one aspect, a method includes defining multiple sets of random quantum circuits; for each set of random quantum circuits: selecting an observable for each element in the set of random quantum circuits, wherein each selected observable corresponds to a respective element of the set of random quantum circuits and is dependent on the element to which it corresponds; estimating a value of a polarization parameter for the set of random quantum circuits, comprising performing a least mean squares minimization based on multiple expectation values, wherein each expectation value comprises an expectation value of a respective selected observable with respect to an output of an experimental implementation of a random quantum circuit corresponding to the respective selected observable; and processing the estimated polarization parameter values to obtain an estimate of the fidelity of the n-qubit quantum logic gate.Type: ApplicationFiled: October 30, 2019Publication date: July 21, 2022Inventors: Sergio Boixo Castrillo, Vadim Smelyanskiy, Hartmut Neven, Alexander Korotkov
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Publication number: 20220138610Abstract: Methods and apparatus for estimating the fidelity of quantum hardware. In one aspect, a method includes accessing a set of quantum gates; sampling a subset of quantum gates from the set of quantum gates, wherein the subset of quantum gates defines a quantum circuit; applying the quantum circuit to a quantum system and performing measurements on the quantum system to determine output information of the quantum system; calculating output information of the quantum system based on application of the quantum circuit to the quantum system; and estimating a fidelity of the quantum circuit based on the determined output information and the calculated output information of the quantum system.Type: ApplicationFiled: January 12, 2022Publication date: May 5, 2022Inventors: John Martinis, Nan Ding, Ryan Babbush, Sergei V. Isakov, Hartmut Neven, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Patent number: 11244240Abstract: Methods and apparatus for estimating the fidelity of quantum hardware. In one aspect, a method includes accessing a set of quantum gates; sampling a subset of quantum gates from the set of quantum gates, wherein the subset of quantum gates defines a quantum circuit; applying the quantum circuit to a quantum system and performing measurements on the quantum system to determine output information of the quantum system; calculating output information of the quantum system based on application of the quantum circuit to the quantum system; and estimating a fidelity of the quantum circuit based on the determined output information and the calculated output information of the quantum system.Type: GrantFiled: May 17, 2016Date of Patent: February 8, 2022Assignee: Google LLCInventors: John Martinis, Nan Ding, Ryan Babbush, Sergei V. Isakov, Hartmut Neven, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Publication number: 20220027773Abstract: Methods, systems and apparatus for generating plunge schedules for implementing iSWAP quantum logic gates between a first qubit and a second qubit. In one aspect, a plunge schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit includes, during a first stage, non-adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel, during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel. during a third stage, allowing the first qubit and the second qubit to freely evolve and interact, during a fourth stage, implementing the second stage in reverse order, and during a fifth stage, implementing the first stage in reverse order.Type: ApplicationFiled: March 5, 2019Publication date: January 27, 2022Inventors: Vadim Smelyanskiy, Andre Petukhov, Rami Barends, Sergio Boixo Castrillo, Yu Chen
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Publication number: 20220012622Abstract: Methods, systems, and apparatus for implementing a unitary quantum gate on one or more qubits. In one aspect, a method includes the actions designing a control pulse for the unitary quantum gate, comprising: defining a universal quantum control cost function, wherein the control cost function comprises a qubit leakage penalty term representing i) coherent qubit leakage, and ii) incoherent qubit leakage across all frequency components during a time dependent Hamiltonian evolution that realizes the unitary quantum gate; adjusting parameters of the time dependent Hamiltonian evolution to vary a control cost according to the control cost function such that leakage errors are reduced; generating the control pulse using the adjusted parameters; and applying the control pulse to the one or more qubits to implement the unitary quantum gate.Type: ApplicationFiled: June 4, 2021Publication date: January 13, 2022Inventors: Yuezhen Niu, Hartmut Neven, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Publication number: 20210390442Abstract: Methods, systems and apparatus for implementing a quantum gate on a quantum system comprising a second qubit coupled to a first qubit and a third qubit. In one aspect, a method includes evolving a state of the quantum system for a predetermined time, wherein during evolving: the ground and first excited state of the second qubit are separated by a first energy gap ?; the first and second excited state of the second qubit are separated by a second energy gap equal to a first multiple of ? minus qubit anharmoniticity?; the ground and first excited state of the first qubit and third qubit are separated by a third energy gap equal to ??; and the first and second excited state of the first qubit and third qubit are separated by a fourth energy gap equal to the first multiple of the ? minus a second multiple of .Type: ApplicationFiled: January 31, 2019Publication date: December 16, 2021Inventors: Yuezhen Niu, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Publication number: 20210272001Abstract: Methods, systems and apparatus for implementing iSWAP quantum logic gates between a first qubit and a second qubit. In one aspect, a method includes implementing a cascade schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit. Implementing the cascade schedule includes: during a first stage, adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel; during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel; during a third stage, evolving the first qubit and second qubit; during a fourth stage, implementing the second stage in reverse order; and during a fifth stage, implementing the first stage in reverse order.Type: ApplicationFiled: January 31, 2019Publication date: September 2, 2021Inventors: Vadim Smelyanskiy, Andre Petukhov, Rami Barends, Sergio Boixo Castrillo
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Patent number: 11055627Abstract: Methods, systems, and apparatus for implementing a unitary quantum gate on one or more qubits. In one aspect, a method includes the actions designing a control pulse for the unitary quantum gate, comprising: defining a universal quantum control cost function, wherein the control cost function comprises a qubit leakage penalty term representing i) coherent qubit leakage, and ii) incoherent qubit leakage across all frequency components during a time dependent Hamiltonian evolution that realizes the unitary quantum gate; adjusting parameters of the time dependent Hamiltonian evolution to vary a control cost according to the control cost function such that leakage errors are reduced; generating the control pulse using the adjusted parameters; and applying the control pulse to the one or more qubits to implement the unitary quantum gate.Type: GrantFiled: January 31, 2018Date of Patent: July 6, 2021Assignee: Google LLCInventors: Yuezhen Niu, Hartmut Neven, Vadim Smelyanskiy, Sergio Boixo Castrillo
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Publication number: 20210192114Abstract: Methods, systems and apparatus for simulating quantum circuits including multiple quantum logic gates. In one aspect, a method includes the actions of representing the multiple quantum logic gates as functions of one or more classical Boolean variables that define a undirected graphical model with each classical Boolean variable representing a vertex in the model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions. The calculated partition function is used to (i) calibrate, (ii) validate, or (iii) benchmark quantum computing hardware implementing a quantum circuit.Type: ApplicationFiled: December 18, 2017Publication date: June 24, 2021Inventors: Sergio Boixo Castrillo, Vadim Smelyanskiy