Patents by Inventor Setsuo Arita

Setsuo Arita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4727539
    Abstract: A plurality of slave stations receive a plurality of apparatus information signals concerning apparatus to be controlled (or sensors), and a master station allots the apparatus information signals to time slots in a transmission path and receives a specified apparatus information signal with priority from the respective slave stations. A priority change information signal adder in the master station adds a priority change information signal for changing priority of the information signals transmitted from each slave station to an information transmission signal string containing a sync signal and various information signals transmitted to each slave station. A multi-element information signal separator/processor in the master station separates and processes the multi-element information signals transmitted from each slave station, on the basis of the priority change information signal.
    Type: Grant
    Filed: March 26, 1986
    Date of Patent: February 23, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Arita, Wataru Kitaura, Yuji Ichinose, Kohyu Fukunishi
  • Patent number: 4707621
    Abstract: The middle value selection circuit includes three high value selection circuits and one low value selection circuit. Each high value selection circuit consists of a pair of first NPN transistors and a first constant current circuit. The emitter of each first NPN transistor of the high value selection circuit is connected to the first constant current circuit and the base of the second NPN transistor of the low value selection circuit. The base of this second NPN transistor is connected to the second constant current circuit and to an output terminal. The collector of the second NPN transistor is connected to its base. The first constant current circuit produces a current whichis twice the output current of the second constant current circuit. Two analog signals having mutually different combination among three input analog signals are applied to the NPN transistors of one high value selection circuit.
    Type: Grant
    Filed: April 24, 1986
    Date of Patent: November 17, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Arita, Takao Sato
  • Patent number: 4673974
    Abstract: Plural television cameras situated at monitored sites, each assigned with a particular code, generate image signals of the sites. An image signal transmitting unit receives those signals and transmits an image transmission signal over a transmission a monitoring site. The transmission signal is so formed that one channel of the transmission line which is divided into plural channels is assigned to the transmission of an image signal of high priority sites so as, to reproduce a full motion image of the remote site at the monitoring site and all the signals from the other sites are transmitted on a time-sharing basis through the remaining channels to reproduce frame repetition images. The assignment of the channels is determined by the order (priority) of codes included in an instruction signal from an instruction signal transmitting unit at the monitoring site. An operator can select the order (priority) of the codes.
    Type: Grant
    Filed: January 7, 1986
    Date of Patent: June 16, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ito, Setsuo Arita, Wataru Kitaura
  • Patent number: 4644346
    Abstract: The present invention consists in disposing a first transmission unit in a control panel which is installed in a central control room, and a second transmission unit in a control device which is installed near an equipment to-be-controlled of a plant. The first transmission unit and the second transmission unit are connected by a cable. Each of the first transmission unit and the second transmission unit comprises a transmitter, a receiver, a serializer, a deserializer, change-over means and change-over control means. The serializer, which produces a serial information signal wherein a plurality of received information signals are arrayed in series, is connected to the transmitter. The deserializer separates a serial information signal delivered from the receiver, into a plurality of information signals. The plurality of change-over means connect a plurality of signal transmission cables respectively connected thereto, to the serializer or the deserializer.
    Type: Grant
    Filed: October 5, 1984
    Date of Patent: February 17, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ito, Setsuo Arita
  • Patent number: 4626707
    Abstract: A signal selection circuit, for example, a high value selection circuit, has two unit circuit elements each including of an amplifier with an inverted input terminal and a non-inverted input terminal, and a transistor of which the base is connected to the output terminal of the amplifier and of which the emitter is connected to the inverted input terminal of the amplifier. Input signals are applied to the non-inverted input terminal of the amplifier. A constant-current circuit is connected to the emitter of npn-type transistor in each of the unit circuit elements, and is further connected to a first power-source terminal. A second power-source terminal is connected to the collector of each of the transistors.
    Type: Grant
    Filed: June 4, 1984
    Date of Patent: December 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Arita, Fumiyasu Ohkido
  • Patent number: 4593249
    Abstract: The middle value selection circuit includes three high value selection circuits and one low value selection circuit. Each high value selection circuit consists of a pair of first NPN transistors and a first constant current circuit. The emitter of each first NPN transistor of the high value selection circuit is connected to the first constant current circuit and the base of the second NPN transistor of the low value selection circuit. The base of this second NPN transistor is connected to the second constant current circuit and to an output terminal. The collector of the second NPN transistor is connected to its base. The first constant current circuit produces a current which is twice the output current of the second constant current circuit. Two analog signals having mutually different combinations among three input analog signals are applied to the NPN transistors of one high value selection circuit.
    Type: Grant
    Filed: July 8, 1983
    Date of Patent: June 3, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Arita, Takao Sato
  • Patent number: 4520483
    Abstract: The present invention relates to a signal diagnostic method for a triple information transmission system. According to this method, using a transmission signal transmitted latest among three transmission signals of three channels, the synchronizing signal parts of the respective transmission signals are synchronized so as to align the heads of information signal parts of the transmission signals, whereupon any error in the information signal parts of the transmission signals is detected. The three transmission signals of the three channels are temporarily stored in three registers. The storage time intervals of the transmission signals in the registers are determined by the transmission time differences between the respective transmission signals and the latest transmission signal. Upon lapse of the predetermined storage time intervals, the transmission signals are fetched from the respective registers.
    Type: Grant
    Filed: September 22, 1982
    Date of Patent: May 28, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Arita, Tetsuo Ito
  • Patent number: 4440715
    Abstract: A nuclear reactor is supplied with feed water through a feed water pump system. A primary steam flow produced from the reactor is controlled by regulating a recirculated flow of feed water. The feed water pump system comprises two main pumps each of 55%-capacity and two auxiliary pumps each of 27.5%-capacity. Normally, the two main pumps are operated. Upon occurrence of abnormal condition of at least one main pump, the auxiliary pumps are started to supply feed water. At that time, the recirculated flow is controlled for a predetermined time to a reduced rate which is smaller as compared with that of the primary steam flow decreased rapidly due to the shutdown of the main pump. Subsequently, the recirculated flow is so controlled that the primary steam flow rate is slightly smaller as compared with the feed water flow which is determined by the available capacity of the pumps.
    Type: Grant
    Filed: October 2, 1980
    Date of Patent: April 3, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Takao Sato, Tetsuo Ito, Setsuo Arita
  • Patent number: 4432048
    Abstract: In a multiple digital controller system which comprises a main or first digital controller and at least one stand-by or second digital controller and in which the main digital controller normally applies the control signal to an object to be controlled, and the stand-by digital controller applies the control signal to the controlled object when the main digital controller is disabled, an improvement is made so that an undesirable level variation may not substantially occur in the control signal applied to the controlled object during the transient state of switch-over from the main digital controller to the stand-by digital controller. In the improved multiple digital controller system according to the present invention, the integral calculation to be carried out in the stand-by digital controller in a period n (n=2, 3, . . .
    Type: Grant
    Filed: June 9, 1981
    Date of Patent: February 14, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ito, Setsuo Arita
  • Patent number: 4287508
    Abstract: Disclosed is an information transmitting and receiving apparatus comprising a transmitting means for sequentially transmitting a plurality of information signals each including a synchronizing signal, an address signal and a data. The information transmitting and receiving apparatus further comprises a receiving means which sequentially receives the transmitted information signals and compares a current data signal of a certain address with the previously received data signal of the same address, and, if both the data signals do not coincide with each other, demands the transmitting means to transmit again the current data signal in sequence irrespective of the order of storing the aforesaid information signals thereby achieving the transmission of the data to be again transmitted.
    Type: Grant
    Filed: September 10, 1979
    Date of Patent: September 1, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Arita, Takao Sato
  • Patent number: 4263580
    Abstract: Command words with address signals are transmitted periodically from a control room to field solenoid valves which are each provided with a single actuation circuit. The solenoid valves that are to be actuated in the field each correspond to the address of the transmitted command words which energize the coil of the corresponding solenoid valve. The actuation circuit inserts an address signal for that particular circuit with regard to current information flowing in the energized coil and sends it back to the control room as an acknowledge word. The control room previously predicts acknowledge words which will be sent back by the actuation circuits when the actuation circuits properly respond to the transmitted command words and the control room registers the predicted acknowledge words as reference words. The acknowledge word sent back by the actuation circuit is compared with the reference word and if an inconsistency exists a fault in the actuation circuit is indicated.
    Type: Grant
    Filed: August 22, 1977
    Date of Patent: April 21, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Takao Sato, Setsuo Arita