Abstract: A radio frequency (RF) device may include a radio frequency integrated circuit (RFIC) chip and an antenna module on an upper surface of the RFIC chip. The antenna module may include a first patch parallel to the RFIC chip and having an upper surface configured to emit radiation in a vertical direction opposite the first patch from the RFIC chip, a ground plate parallel to the first patch, and between the first patch and the RFIC chip, and a first plurality of feed lines connected to a lower surface of the first patch and configured to supply at least one first differential signal to the first patch from the RFIC chip.

Abstract: A method of testing a radio frequency (RF) integrated circuit includes: forming, performed by the RF integrated circuit, a test loop that passes through a first transceiver circuit, a first front-end circuit, and a second transceiver circuit, based on a test control signal transmitted from a test device; adjusting, performed by the RF integrated circuit, a shift degree of at least one phase shifter in the first front-end circuit, based on the test control circuit; and receiving, performed by the RF integrated circuit, a test input signal via the first transceiver circuit from the test device, and outputting, to the test device, the test input signal that has passed through the test loop, wherein the test input signal is output as a test output signal via the second transceiver circuit.

Abstract: A method of testing a radio frequency (RF) integrated circuit includes: forming, performed by the RF integrated circuit, a test loop that passes through a first transceiver circuit, a first front-end circuit, and a second transceiver circuit, based on a test control signal transmitted from a test device; adjusting, performed by the RF integrated circuit, a shift degree of at least one phase shifter in the first front-end circuit, based on the test control circuit; and receiving, performed by the RF integrated circuit, a test input signal via the first transceiver circuit from the test device, and outputting, to the test device, the test input signal that has passed through the test loop, wherein the test input signal is output as a test output signal via the second transceiver circuit.

Abstract: A wireless terminal is provided that includes a first receiver that includes a first input unit configured to perform impedance matching on a first reception signal to output a first RF input signal. A first amplification unit is configured to amplify the first RF input signal to output one or more first RF output signals in an inter-band CA mode and an intra-band CA mode. A first output unit is configured to down-convert at least one of the one or more first RF output signals to a baseband. A second receiver includes a second output unit. In the intra-band CA mode, the one or more first RF output signals includes a first RF signal and a second RF signal, and the first amplification unit is further configured to provide the first output unit with the first RF signal and provide the second output unit with the second RF signal.

Abstract: A radio frequency (RF) device may include a radio frequency integrated circuit (RFIC) chip and an antenna module on an upper surface of the RFIC chip. The antenna module may include a first patch parallel to the RFIC chip and having an upper surface configured to emit radiation in a vertical direction opposite the first patch from the RFIC chip, a ground plate parallel to the first patch, and between the first patch and the RFIC chip, and a first plurality of feed lines connected to a lower surface of the first patch and configured to supply at least one first differential signal to the first patch from the RFIC chip.

Abstract: A wireless terminal is provided that includes a first receiver that includes a first input unit configured to perform impedance matching on a first reception signal to output a first RF input signal. A first amplification unit is configured to amplify the first RF input signal to output one or more first RF output signals in an inter-band CA mode and an intra-band CA mode. A first output unit is configured to down-convert at least one of the one or more first RF output signals to a baseband. A second receiver includes a second output unit. In the intra-band CA mode, the one or more first RF output signals includes a first RF signal and a second RF signal, and the first amplification unit is further configured to provide the first output unit with the first RF signal and provide the second output unit with the second RF signal.

Abstract: A wireless terminal and a receiver are provided that include a first amplifier configured to receive and amplify a first radio frequency (RF) input signal, and configured to output a first RF output signal corresponding to a first carrier included in a first frequency band. The receiver also includes a first sub amplifier configured to, when a mode signal indicates a first mode, receive a first internal signal from the first amplifier, amplify the first internal signal, and output a second RF output signal corresponding to a second carrier included in the first frequency band.

Abstract: An electronic device for and method of determining a calibration code is provided. The electronic device includes a modem configured to receive a transmission signal, determine a calibration code that minimizes distortion of the transmission signal, and calibrate the distortion of the transmission signal using the calibration code.

Abstract: A wireless terminal and a receiver are provided that include a first amplifier configured to receive and amplify a first radio frequency (RF) input signal, and configured to output a first RF output signal corresponding to a first carrier included in a first frequency band. The receiver also includes a first sub amplifier configured to, when a mode signal indicates a first mode, receive a first internal signal from the first amplifier, amplify the first internal signal, and output a second RF output signal corresponding to a second carrier included in the first frequency band.

Abstract: An electronic device for and method of determining a calibration code is provided. The electronic device includes a modem configured to receive a transmission signal, determine a calibration code that minimizes distortion of the transmission signal, and calibrate the distortion of the transmission signal using the calibration code.

Abstract: An analog-to-digital conversion method using an RC time constant calibrator is provided. The method includes the operations of comparing a crossing time point at which a first reference signal and a second reference signal cross each other with a target time point and calibrating an RC time constant according to a result of the comparison. A length of time until the crossing time point at which a first analog signal and a second analog signal cross each other is counted based on a calibrated RC time constant. The counted value is output.

Abstract: An analog-to-digital conversion method using an RC time constant calibrator is provided. The method includes the operations of comparing a crossing time point at which a first reference signal and a second reference signal cross each other with a target time point and calibrating an RC time constant according to a result of the comparison. A length of time until the crossing time point at which a first analog signal and a second analog signal cross each other is counted based on a calibrated RC time constant. The counted value is output.

Abstract: A low-pass filtering circuit and method are disclosed. The circuit includes a low-pass filter with a capacitor, and a multiplier configured to multiply the capacitance of the capacitor by feeding-back a high-frequency signal apparent in an output signal of the low-pass filter to the capacitor.

Abstract: An example embodiment provides a method for calibrating an active RC filter and RC time constant calibrator for an active RC filter. The RC time contact calibrator includes a RC timer and a calibration code generator. The RC timer outputs a holding signal based on a comparison of a first output signal and a second output signal. The holding signal output by the RC timer causes a digital count value to be compared to a digital target value. The calibration code generator generates a slope control code and a flag signal based on the comparison of the digital count value and the digital target value and outputs the slope control code as a calibration code based on the flag signal. The slope control code controls the slope of the first output signal and the slope of the second output signal.

Abstract: A gain controllable wide-band low noise amplifier includes a first transistor coupled to an input node and an output node and amplifying an input signal to generate an output signal, a second transistor allowing the output signal to feedback to the input node, and a control circuit complementarily controlling transconductance of the first and second transistors.

Abstract: A low-pass filtering circuit and method are disclosed. The circuit includes a low-pass filter with a capacitor, and a multiplier configured to multiply the capacitance of the capacitor by feeding-back a high-frequency signal apparent in an output signal of the low-pass filter to the capacitor.

Abstract: An example embodiment provides a method for calibrating an active RC filter and RC time constant calibrator for an active RC filter. The RC time contact calibrator includes a RC timer and a calibration code generator. The RC timer outputs a holding signal based on a comparison of a first output signal and a second output signal. The holding signal output by the RC timer causes a digital count value to be compared to a digital target value. The calibration code generator generates a slope control code and a flag signal based on the comparison of the digital count value and the digital target value and outputs the slope control code as a calibration code based on the flag signal. The slope control code controls the slope of the first output signal and the slope of the second output signal.

Abstract: A gain controllable wide-band low noise amplifier includes a first transistor coupled to an input node and an output node and amplifying an input signal to generate an output signal, a second transistor allowing the output signal to feedback to the input node, and a control circuit complementarily controlling transconductance of the first and second transistors.