Patents by Inventor Seung Cheol Lee

Seung Cheol Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9130013
    Abstract: A method of manufacturing a semiconductor device includes forming isolation layers in a first direction at trenches at isolation regions defined at a semiconductor substrate and forming gate lines in a second direction crossing the first direction over the isolation layers and active regions defined between the isolation layers, performing a dry-etch process to remove the isolation layers, and forming an insulating layer over the semiconductor substrate to form a first air gap extending in the first direction in the trenches and a second air gap extending in the second direction between the gate lines.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: September 8, 2015
    Assignee: SK Hynix Inc.
    Inventors: Seung Cheol Lee, Yang Bok Lee
  • Publication number: 20150187789
    Abstract: A semiconductor device that includes a plurality of first conductive patterns stacked over a substrate, dummy patterns formed in the first conductive patterns, respectively, first barrier patterns each surrounding the respective first conductive patterns and partially interposed between the respective first conductive patterns and the respective dummy patterns, second barrier patterns each surrounding the respective first barrier patterns and the respective dummy patterns, a second conductive pattern located over or under the first conductive patterns, and a third barrier pattern surrounding the second conductive pattern, wherein the second conductive pattern has a greater thickness than the first conductive patterns.
    Type: Application
    Filed: May 28, 2014
    Publication date: July 2, 2015
    Applicant: SK hynix Inc.
    Inventor: Seung Cheol LEE
  • Patent number: 9023724
    Abstract: A method of manufacturing a semiconductor memory device comprises forming a plurality of gate lines on a semiconductor substrate, forming an insulating layer on the gate lines, and performing a cleaning process using a surfactant-free cleaning solution having a viscosity of lower than 2 cP and an acidity of lower than 3 pH to remove residue from the surface of the insulating layer.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: May 5, 2015
    Assignee: SK Hynix Inc.
    Inventors: Duk Eui Lee, Seung Cheol Lee
  • Publication number: 20150106706
    Abstract: An electronic device and a method for controlling an object display are provided. The method of controlling an object display includes displaying at least one input object on a screen, creating and storing property information of the at least one displayed object, creating a preview window in a region of the screen so as to display the at least one object on the preview window, and controlling a display of the object by using the property information of the at least one selected object in correspondence to the at least one displayed object.
    Type: Application
    Filed: April 23, 2014
    Publication date: April 16, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hong JEONG, Seung-Cheol Lee, Seok-Kyoun Park, Sun-Kee Lee, Cheol-Ho Cheong, Joon-Young Cho, Bo-Kun Choi, Kyung-Hee Lee
  • Patent number: 8941725
    Abstract: A method of processing three-dimensional (3D) stereoscopic image data is provided that includes comparing the polarity of image data of a present frame with the polarity of image data of a previous frame. The image data of the present frame are compensated according to the result of the comparison. The image data of the present frame is compensated to generate first compensation data, when the polarity of the image data of the present frame is opposite to the polarity of the image data of the previous frame, with respect a reference voltage.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: January 27, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Moon Moh, Mi-Sun Lee, Sang-Yong No, Seung-Cheol Lee
  • Publication number: 20140348372
    Abstract: Disclosed herein is a canal type earphone with a pressure equilibrium means, capable of eliminating a pressure difference between a user's external auditory meatus and an outside during wearing of the canal type earphone. A pressure equilibrium means includes a side air passage through which air within a tube or air within a speaker unit in the canal type earphone is discharged to a side surface of a gasket or a side surface of the speaker unit, and a rear air passage through which air in the side surface of the speaker unit is discharged to the rear of the speaker unit.
    Type: Application
    Filed: May 27, 2014
    Publication date: November 27, 2014
    Applicant: BUJEON CO., LTD.
    Inventors: Dong Hyun SEO, Seung Cheol LEE, Su Cheon LEE
  • Publication number: 20140252434
    Abstract: A method of manufacturing a semiconductor device includes forming isolation layers in a first direction at trenches at isolation regions defined at a semiconductor substrate and forming gate lines in a second direction crossing the first direction over the isolation layers and active regions defined between the isolation layers, performing a dry-etch process to remove the isolation layers, and forming an insulating layer over the semiconductor substrate to form a first air gap extending in the first direction in the trenches and a second air gap extending in the second direction between the gate lines.
    Type: Application
    Filed: July 15, 2013
    Publication date: September 11, 2014
    Inventors: Seung Cheol LEE, Yang Bok LEE
  • Publication number: 20140225792
    Abstract: Disclosed is an antenna in which certain radiators are shared for multiple frequency bands. The antenna may include at least one first radiator for a first frequency band; one or more second radiator for a second frequency band; and a third radiator. Here, the third radiator may be used when realizing the first frequency band and may also be used when realizing the second frequency band.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 14, 2014
    Applicant: ACE TECHNOLOGIES CORPORATION
    Inventors: Seung-Cheol Lee, Seung-Chul Lee
  • Publication number: 20140184464
    Abstract: A multi-array antenna having superior electrical properties is disclosed. The multi-array antenna includes a reflector plate; first radiators arranged over a surface of the reflector plate and configured to form a first beam; and second radiators arranged over a surface of the reflector plate and configured to form a second beam. Here, one of the first radiators and one of the second radiators are arranged in an imaginary first line along a lengthwise direction of the reflector plate, another one of the first radiators and another one of the second radiators are arranged in an imaginary second line, the first radiator arranged in the first line and the first radiator arranged in the second line are positioned in a diagonal direction, and the second radiator arranged in the first line and the second radiator arranged in the second line are positioned in a diagonal direction.
    Type: Application
    Filed: August 28, 2013
    Publication date: July 3, 2014
    Applicant: ACE TECHNOLOGIES CORPORATION
    Inventors: Battarov Ilnar, Jae-Hoon Tae, Min-Seok Jung, Seung-Cheol Lee
  • Patent number: 8765587
    Abstract: A method of manufacturing non-volatile memory devices includes forming a gate insulating layer and a first conductive layer over a semiconductor substrate, etching the first conductive layer and the gate insulating layer to expose part of the semiconductor substrate, forming trenches at a target depth of the semiconductor substrate by repeatedly performing a dry etch process for etching the exposed semiconductor substrate and a cleaning process for removing residues generated in the dry etch process, forming isolation layers within the trenches, forming a dielectric layer on a surface of the entire structure in which the isolation layers are formed, and forming a second conductive layer on the dielectric layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: July 1, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Su Hyun Lim, Seung Cheol Lee
  • Patent number: 8731223
    Abstract: Disclosed is a microspeaker with an inner resonance chamber, more particularly a microspeaker with an inner resonance chamber which improves quality of sound and enables slim and compact design of the microspeaker by blocking rearward sound generated at the rear side of the vibration plate to prevent interference of a rearward sound with a forward sound generated at the front side of a vibration plate and installing a chamber with a specific volume within the microspeaker to allow the rearward sound to cause resonance.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: May 20, 2014
    Assignee: Bujeon Co., Ltd.
    Inventors: Dong Hyun Seo, Seung Cheol Lee
  • Publication number: 20130164925
    Abstract: A method of manufacturing a semiconductor memory device comprises forming a plurality of gate lines on a semiconductor substrate, forming an insulating layer on the gate lines, and performing a cleaning process using a surfactant-free cleaning solution having a viscosity of lower than 2 cP and an acidity of lower than 3 pH to remove residue from the surface of the insulating layer.
    Type: Application
    Filed: August 31, 2012
    Publication date: June 27, 2013
    Inventors: Duk Eui LEE, Seung Cheol LEE
  • Patent number: 8362855
    Abstract: An RF cavity filter is disclosed. The disclosed filter includes: a housing having at least one cavity defined; a cover coupled to an upper portion of the housing; at least one resonator contained within the at least one cavity; at least one hole formed in the cover; at least one grounding bolt configured to be inserted into the hole, having a screw thread formed on a part of an outer perimeter, and having a center hole in a center portion; and at least one tuning bolt inserted into the housing through the center hole along a screw thread formed on an inner perimeter of the center hole, where the grounding bolt has a flange part formed on a lower portion that is in contact with the tuning bolt and a lower portion of the cover.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: January 29, 2013
    Assignee: Ace Technologies Corporation
    Inventor: Seung-Cheol Lee
  • Patent number: 8318268
    Abstract: There is provided a fabrication method for an AA stacked graphene-diamond hybrid material by converting, through a high temperature treatment on diamond, a diamond surface into graphene. According to the present invention, if various types of diamond are maintained at a certain temperature having a stable graphene phase (approximately greater than 1200° C.) in a hydrogen gas atmosphere, two diamond {111} lattice planes are converted into one graphene plate (2:1 conversion), whereby the diamond surface is converted into graphene in a certain thickness, thus to fabricate the AA stacked graphene-diamond hybrid material.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: November 27, 2012
    Assignee: Korea Institute of Science and Technology
    Inventors: Jae-Kap Lee, So-Hyung Lee, Seung-Cheol Lee, Jae-Pyoung Ahn, Jeon-Kook Lee, Wook-Seong Lee
  • Publication number: 20120229359
    Abstract: A feeding system for feeding power using slow wave structure is disclosed. The feeding system includes a first substrate, a first pattern disposed on the first substrate, being a conductor, a second substrate separated from the first substrate, and a second pattern configured to locate on the second substrate, being a conductor. Here, the first pattern and the second pattern are connected electrically, and at least one of the first pattern and the second pattern has a slow wave structure.
    Type: Application
    Filed: November 22, 2010
    Publication date: September 13, 2012
    Applicant: ACE TECHNOLOGIES CORPORATION
    Inventor: Seung-Cheol Lee
  • Publication number: 20120214298
    Abstract: A method of manufacturing non-volatile memory devices includes forming a gate insulating layer and a first conductive layer over a semiconductor substrate, etching the first conductive layer and the gate insulating layer to expose part of the semiconductor substrate, forming trenches at a target depth of the semiconductor substrate by repeatedly performing a dry etch process for etching the exposed semiconductor substrate and a cleaning process for removing residues generated in the dry etch process, forming isolation layers within the trenches, forming a dielectric layer on a surface of the entire structure in which the isolation layers are formed, and forming a second conductive layer on the dielectric layer.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 23, 2012
    Inventors: Su Hyun LIM, Seung Cheol LEE
  • Publication number: 20120200463
    Abstract: A broadband internal antenna using double electromagnetic coupling is disclosed. The disclosed antenna may include: a first conducting member electrically connected to a feeding point; a second conducting member placed at a designated distance from at least a portion of the first conducting member so as to allow a first electromagnetic coupling with at least a portion of the first conducting member, and remaining in a floating state without being coupled to a ground and the feeding point; a third conducting member placed at a designated distance from the second conducting member so as to allow a second electromagnetic coupling with the second conducting member, and electrically connected to the ground; and a fourth conducting member extending from the third conducting member, for radiating RF signals. The disclosed antenna has the advantage of providing broadband characteristics within a limited size.
    Type: Application
    Filed: October 13, 2010
    Publication date: August 9, 2012
    Applicant: ACE TECHNOLOGIES CORPORATION
    Inventors: Byoung-Nam Kim, Jong-Ho Jung, Seung-Cheol Lee
  • Patent number: D667826
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: September 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Joo Lee, Eui-Seok Kim, Jun-Ho Yang, Seung-Cheol Lee
  • Patent number: D701241
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-Cheol Lee
  • Patent number: D701242
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: March 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-Cheol Lee