Abstract: The present invention relates to an antigen-binding molecule comprising a heavy chain variable region comprising a heavy-chain complementarity-determining region 1 (HCDR1) comprising an amino acid sequence represented by Sequence No. 1, an HCDR2 comprising an amino acid sequence represented by Sequence No. 2, and an HCDR3 comprising an amino acid sequence represented by Sequence No. 3; a light-chain variable region comprising a light-chain complementarity-determining region 1 (LCDR1) comprising an amino acid sequence represented by Sequence No. 4, an LCDR2 comprising an amino acid sequence represented by Sequence No. 5, and an LCDR3 comprising an amino acid sequence represented by Sequence No. 6; wherein the antigen-binding molecule is a T cell receptor (TCR); and to a cell line expressing the same.

Abstract: An apparatus for supplying food ingredients according to the present disclosure includes a food ingredient lifting part configured to separate and move upward a food ingredient stack from a food ingredient cassette on which food ingredients including a plurality of stacked food ingredients are seated, a food ingredient separation part configured to suck and move upward a single sheet of a food ingredient from the food ingredient stack moved upward by the food ingredient lifting part, and a horizontal movement part configured to transfer forward the single sheet of the food ingredient moved upward by the food ingredient separation part.

Abstract: A system for manufacturing edible food products according to the present disclosure includes a first food ingredient supply apparatus configured to separate a single sheet of a first food ingredient from a first food ingredient stack including a plurality of stacked first food ingredients and supply the single sheet of first food ingredient, a second food ingredient supply apparatus configured to separate a single sheet of a second food ingredient from a second food ingredient stack including a plurality of stacked second food ingredients and supply the single sheet of second food ingredient, and a pressing device configured to form an edible food product by pressing a semi-finished product formed by seating the supplied single sheet of the first food ingredient on the supplied single sheet of the second food ingredient.

Abstract: A cutting apparatus according to the present disclosure includes a cutting roller including a cutting body having a cylindrical shape and configured to rotate about an axis defined in a leftward/rightward direction, and cutting blades protruding outward in a radial direction of the cutting body further than a surface of the cutting body to cut an edible food product provided in a forward/rearward direction, and a cutting base part disposed at a position facing the cutting roller based on the edible food product to support the edible food product to be cut by the cutting roller.

Abstract: A method for estimating channel characteristics of a nonvolatile memory device including a plurality of memory cells includes the steps of: calculating first threshold voltage distributions of the memory cells programmed according to input data, based on the input data and a physical structure of the memory cells; calculating second threshold voltage distributions of the memory cells, based on output data and the physical structure of the memory cells; and analyzing the relation between the first and second threshold voltage distributions, using a mask.

Abstract: A method for estimating channel characteristics of a nonvolatile memory device including a plurality of memory cells includes the steps of: calculating first threshold voltage distributions of the memory cells programmed according to input data, based on the input data and a physical structure of the memory cells; calculating second threshold voltage distributions of the memory cells, based on output data and the physical structure of the memory cells; and analyzing the relation between the first and second threshold voltage distributions, using a mask.

Abstract: Disclosed is an exemplary video coder and video coding method according to an embodiment of the present invention. The exemplary video coder includes a scheduler, a plurality of processors and a multiplexer. The scheduler can examine processing units in an input buffer to determine an order for the processing unit to be coded by a processor. If the processing unit under examination depends on a processing unit not yet processed, the processing unit under examination can be merged with other processing units, if any, that share a similar dependency. If the processing unit under examination does not depend on any processing units not yet processed, it can be sent to a next available processor for coding. When a processing unit is sent to a processor, any merged processing units that depend on sent processing unit can also be sent to a next available processor.

Abstract: A semiconductor memory device includes a memory cell array including an even page cell group and an odd page cell group, and a page buffer configured to read data stored in memory cells of the even page cell group and the odd page cell group and store the read data. The page buffer comprises a first latch configured to store first even page data of the even page cell group when a first read operation is performed, a second latch configured to store odd page data of the odd page cell group when a second read operation is performed, and a third latch configured to store second even page data of the even page cell group when a third read operation is performed.

Abstract: Techniques, systems and apparatus are described for adjusting auto white balance (AWB). An AWB adjusting device includes a map setting unit to perform map-setting on a number of light-source boxes that is at least M times greater than a number of registers by performing map-switching. M is an integer greater than or equal to 2. The AWB adjusting device includes a pixel counting unit for counting a number of white pixels of a standard image contained in each light-source box with map-setting. The AWB adjusting device includes a light-source selection unit to select a light source based on a maximum light-source box selected from the number of light-source boxes having a greatest number of the white pixels. The AWB adjusting device includes a balance gain applying unit to calculate a red gain and a blue gain based on a mapping value of the maximum light-source box to adjust AWB.

Abstract: A nonvolatile memory device includes a comparison unit configured to compare a reference voltage and a voltage of each of a plurality of nodes of a sample memory cell string, a state storage unit configured to store state information of each of memory cells depending on the corresponding comparison result of the comparison unit, and a high voltage generation unit configured to change a program start voltage depending on data stored in the state storage unit.

Abstract: A semiconductor memory device includes a memory cell array including an even page cell group and an odd page cell group, and a page buffer configured to read data stored in memory cells of the even page cell group and the odd page cell group and store the read data. The page buffer comprises a first latch configured to store first even page data of the even page cell group when a first read operation is performed, a second latch configured to store odd page data of the odd page cell group when a second read operation is performed, and a third latch configured to store second even page data of the even page cell group when a third read operation is performed.

Abstract: Techniques, systems and apparatus are described for adjusting auto white balance (AWB). An AWB adjusting device includes a map setting unit to perform map-setting on a number of light-source boxes that is at least M times greater than a number of registers by performing map-switching. M is an integer greater than or equal to 2. The AWB adjusting device includes a pixel counting unit for counting a number of white pixels of a standard image contained in each light-source box with map-setting. The AWB adjusting device includes a light-source selection unit to select a light source based on a maximum light-source box selected from the number of light-source boxes having a greatest number of the white pixels. The AWB adjusting device includes a balance gain applying unit to calculate a red gain and a blue gain based on a mapping value of the maximum light-source box to adjust AWB.

Abstract: A nonvolatile memory device includes a comparison unit configured to compare a reference voltage and a voltage of each of a plurality of nodes of a sample memory cell string, a state storage unit configured to store state information of each of memory cells depending on the corresponding comparison result of the comparison unit, and a high voltage generation unit configured to change a program start voltage depending on data stored in the state storage unit.

Abstract: Disclosed is an exemplary video coder and video coding method according to an embodiment of the present invention. The exemplary video coder includes a scheduler, a plurality of processors and a multiplexer. The scheduler can examine processing units in an input buffer to determine an order for the processing unit to be coded by a processor. If the processing unit under examination depends on a processing unit not yet processed, the processing unit under examination can be merged with other processing units, if any, that share a similar dependency. If the processing unit under examination does not depend on any processing units not yet processed, it can be sent to a next available processor for coding. When a processing unit is sent to a processor, any merged processing units that depend on sent processing unit can also be sent to a next available processor.

Abstract: The present invention relates to a method of programming a flash memory device. According to the present invention, after a program operation is completed, a program verify operation is repeatedly performed, wherein a threshold voltage of a programmed memory cell is also detected. If there are memory cells whose threshold voltage becomes low as a result of the detection, the program operation is again performed on a corresponding memory cell. It is thus possible to obtain a uniform distribution characteristic of a threshold voltage. Furthermore, a program verify operation is performed with a compare voltage being set higher than a target voltage initially so that a threshold voltage of a memory cell is sufficiently higher than the target voltage. The program verify operation is again performed while lowering the compare voltage according to the repetition number. It is thus possible to prevent normally programmed cells from being again excessively programmed.

Abstract: A program operation and a program verification operation are repeatedly performed. The program verification operation is performed on memory cells including pass cells to obtain a uniform distribution characteristic of a threshold voltage. Furthermore, the program verification operation is performed with a compare voltage being set higher than a target voltage initially so that a threshold voltage of a memory cell is sufficiently higher than the target voltage. The program verification operation is again performed lowering the compare voltage according to the repetition number. Thus, normally programmed cells are prevented from being again excessively programmed.

Abstract: The disclosed is a method of reading a multi-level NAND flash memory cell and a circuit for the same. The read circuit for the NAND flash memory device includes a NAND flash memory cell having multi-level information, a first page buffer for storing an upper-bit, a second page buffer for storing a lower bit, and pass transistor for changing information of the second page buffer according to a variation of the first page buffer. In accordance with the present invention, “00” or “01” information is read out by applying a first voltage to a word line of the cell. “00”, “01”, or “11” information is read out by applying a second voltage to the word line. A latch pass control signal is applied to a pass transistor. Thus, it is possible to read out “00”, “01”, “11”, or “10” information.

Abstract: A method of programming a multi-level flash memory using a sensing circuit according to the present invention performs an automatic verification program method of performing verification while performing a program. The method can reduce the power consumption by detecting a program data stored at a register to stop an operation of the sensing circuit for memory cells for which the program is completed. Also, a method of reading the flash memory senses the state of the threshold voltage of a cell using the sense amplifier used in the program operation while increasing or lowering the voltage applied to a control gate step-by-step and then stores the level value generated in a counter at the registers depending on its state, wherein an operation of the sensing circuit for the memory cells for which the program is completed is stopped.

Abstract: The present invention relates to a flash memory device and a method of erasing the same. Pre-program and post-program operations are performed using an automatic verify program method, and an erase operation is performed using an iterative program and verify method, by the use of sense amplifiers that can perform the iterative program and verify method and the automatic verify program method.

Abstract: A method of programming a multi-level flash memory using a sensing circuit according to the present invention performs an automatic verification program method of performing verification while performing a program. The method can reduce the power consumption by detecting a program data stored at a register to stop an operation of the sensing circuit for memory cells for which the program is completed. Also, a method of reading the flash memory senses the state of the threshold voltage of a cell using the sense amplifier used in the program operation while increasing or lowering the voltage applied to a control gate step-by-step and then stores the level value generated in a counter at the registers depending on its state, wherein an operation of the sensing circuit for the memory cells for which the program is completed is stopped.