Patents by Inventor Seung-Muk KIM

Seung-Muk KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929207
    Abstract: A capacitor includes: a plurality of bottom electrodes; a dielectric layer formed over the bottom electrodes; and a top electrode formed over the dielectric layer, wherein the top electrode includes a carbon-containing material and a germanium-containing material that fill a gap between the bottom electrodes.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: March 12, 2024
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Patent number: 11888018
    Abstract: A capacitor includes a plurality of lower bottom electrodes, a lower supporter supporting the lower bottom electrodes and including a plurality of lower supporter openings, upper bottom electrodes formed on the lower bottom electrodes, respectively, and an upper supporter supporting the upper bottom electrodes and including a plurality of upper supporter openings, wherein the lower supporter openings and the upper supporter openings do not vertically overlap each other.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: January 30, 2024
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Patent number: 11594594
    Abstract: A method for fabricating a semiconductor device includes forming an upper structure in which a bottom electrode, a dielectric layer, a top electrode and a plasma protection layer are sequentially stacked on a lower structure, exposing the upper structure to a plasma treatment, and exposing the plasma-treated upper structure and the lower structure to a hydrogen passivation process.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: February 28, 2023
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Publication number: 20220231118
    Abstract: A method for fabricating a semiconductor device includes forming an upper structure in which a bottom electrode, a dielectric layer, a top electrode and a plasma protection layer are sequentially stacked on a lower structure, exposing the upper structure to a plasma treatment, and exposing the plasma-treated upper structure and the lower structure to a hydrogen passivation process.
    Type: Application
    Filed: April 4, 2022
    Publication date: July 21, 2022
    Inventor: Seung-Muk KIM
  • Patent number: 11374087
    Abstract: A method for fabricating a semiconductor device includes forming an upper structure in which a bottom electrode, a dielectric layer, a top electrode and a plasma protection layer are sequentially stacked on a lower structure, exposing the upper structure to a plasma treatment, and exposing the plasma-treated upper structure and the lower structure to a hydrogen passivation process.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: June 28, 2022
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Publication number: 20220157928
    Abstract: A method for fabricating a semiconductor device includes: forming a lower array including a plurality of bottom electrodes over a semiconductor substrate, a supporter supporting the bottom electrodes, and a dielectric layer that is formed over the bottom electrodes and the supporter; forming a gap-fill layer covering side portions of the lower array and an upper portion of the lower array; forming a capping portion covering the upper portion of the lower array over the gap-fill layer; performing a pull-back process of the gap-fill layer to form a gap-fill electrode aligned with the capping portion; and forming a low-resistivity electrode over the gap-fill electrode.
    Type: Application
    Filed: February 1, 2022
    Publication date: May 19, 2022
    Inventor: Seung Muk KIM
  • Publication number: 20220122773
    Abstract: A capacitor includes: a plurality of bottom electrodes; a dielectric layer formed over the bottom electrodes; and a top electrode formed over the dielectric layer, wherein the top electrode includes a carbon-containing material and a germanium-containing material that fill a gap between the bottom electrodes.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Inventor: Seung-Muk KIM
  • Patent number: 11271073
    Abstract: A method for fabricating a semiconductor device includes: forming a lower array including a plurality of bottom electrodes over a semiconductor substrate, a supporter supporting the bottom electrodes, and a dielectric layer that is formed over the bottom electrodes and the supporter; forming a gap-fill layer covering side portions of the lower array and an upper portion of the lower array; forming a capping portion covering the upper portion of the lower array over the gap-fill layer; performing a pull-back process of the gap-fill layer to form a gap-fill electrode aligned with the capping portion; and forming a low-resistivity electrode over the gap-fill electrode.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: March 8, 2022
    Assignee: SK hynix Inc.
    Inventor: Seung Muk Kim
  • Patent number: 11244787
    Abstract: A capacitor includes: a plurality of bottom electrodes; a dielectric layer formed over the bottom electrodes; and a top electrode formed over the dielectric layer, wherein the top electrode includes a carbon-containing material and a germanium-containing material that fill a gap between the bottom electrodes.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: February 8, 2022
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Publication number: 20210272959
    Abstract: A method for fabricating a semiconductor device includes: forming a lower array including a plurality of bottom electrodes over a semiconductor substrate, a supporter supporting the bottom electrodes, and a dielectric layer that is formed over the bottom electrodes and the supporter; forming a gap-fill layer covering side portions of the lower array and an upper portion of the lower array; forming a capping portion covering the upper portion of the lower array over the gap-fill layer; performing a pull-back process of the gap-fill layer to form a gap-fill electrode aligned with the capping portion; and forming a low-resistivity electrode over the gap-fill electrode.
    Type: Application
    Filed: August 7, 2020
    Publication date: September 2, 2021
    Inventor: Seung Muk KIM
  • Publication number: 20210210593
    Abstract: A capacitor includes a plurality of lower bottom electrodes, a lower supporter supporting the lower bottom electrodes and including a plurality of lower supporter openings, upper bottom electrodes formed on the lower bottom electrodes, respectively, and an upper supporter supporting the upper bottom electrodes and including a plurality of upper supporter openings, wherein the lower supporter openings and the upper supporter openings do not vertically overlap each other.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 8, 2021
    Inventor: Seung-Muk KIM
  • Patent number: 10985238
    Abstract: A capacitor includes a plurality of lower bottom electrodes, a lower supporter supporting the lower bottom electrodes and including a plurality of lower supporter openings, upper bottom electrodes formed on the lower bottom electrodes, respectively, and an upper supporter supporting the upper bottom electrodes and including a plurality of upper supporter openings, wherein the lower supporter openings and the upper supporter openings do not vertically overlap each other.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: April 20, 2021
    Assignee: SK hynix Inc.
    Inventor: Seung-Muk Kim
  • Publication number: 20200312552
    Abstract: A capacitor includes: a plurality of bottom electrodes; a dielectric layer formed over the bottom electrodes; and a top electrode formed over the dielectric layer, wherein the top electrode includes a carbon-containing material and a germanium-containing material that fill a gap between the bottom electrodes.
    Type: Application
    Filed: November 8, 2019
    Publication date: October 1, 2020
    Inventor: Seung-Muk KIM
  • Publication number: 20200312948
    Abstract: A capacitor includes a plurality of lower bottom electrodes, a lower supporter supporting the lower bottom electrodes and including a plurality of lower supporter openings, upper bottom electrodes formed on the lower bottom electrodes, respectively, and an upper supporter supporting the upper bottom electrodes and including a plurality of upper supporter openings, wherein the lower supporter openings and the upper supporter openings do not vertically overlap each other.
    Type: Application
    Filed: November 8, 2019
    Publication date: October 1, 2020
    Inventor: Seung-Muk KIM
  • Publication number: 20200212169
    Abstract: A method for fabricating a semiconductor device includes forming an upper structure in which a bottom electrode, a dielectric layer, a top electrode and a plasma protection layer are sequentially stacked on a lower structure, exposing the upper structure to a plasma treatment, and exposing the plasma-treated upper structure and the lower structure to a hydrogen passivation process.
    Type: Application
    Filed: August 7, 2019
    Publication date: July 2, 2020
    Inventor: Seung-Muk KIM