Abstract: A wiring board may include a core portion having first and second surfaces, and first and second buildup portions on the first and second surfaces, respectively. Each of the first and second buildup portions may include a first insulating layer on the core portion, a wire pattern on the first insulating layer, a second insulating layer on the first insulating layer to cover the wire pattern, and a protection layer covering the second insulating layer and exposing a portion of the wire pattern. The second insulating layer may include a resin layer and inorganic fillers distributed in the resin layer. The fillers may not be provided in the protection layer, and the resin layer of the second insulating layer and the protection layer may be formed of the same material. The wire patterns of the first and second buildup portions may be electrically connected to each other.

Abstract: A wiring board may include a core portion having first and second surfaces, and first and second buildup portions on the first and second surfaces, respectively. Each of the first and second buildup portions may include a first insulating layer on the core portion, a wire pattern on the first insulating layer, a second insulating layer on the first insulating layer to cover the wire pattern, and a protection layer covering the second insulating layer and exposing a portion of the wire pattern. The second insulating layer may include a resin layer and inorganic fillers distributed in the resin layer. The fillers may not be provided in the protection layer, and the resin layer of the second insulating layer and the protection layer may be formed of the same material. The wire patterns of the first and second buildup portions may be electrically connected to each other.

Abstract: A circuit board includes at least one prepreg including a fiber layer, the fiber layer being woven with a plurality of first fibers arranged in a first direction and a plurality of second fibers arranged in a second direction that is substantially perpendicular to the first direction, and a circuit layer on at least one of opposite surfaces of the at least one prepreg. The at least one prepreg has a length in the first direction greater than a length in the second direction, each of the plurality of first fibers is formed of or includes a filling yarn, and each of the plurality of second fibers is formed of or includes a warp yarn.

Abstract: A circuit board includes at least one prepreg including a fiber layer, the fiber layer being woven with a plurality of first fibers arranged in a first direction and a plurality of second fibers arranged in a second direction that is substantially perpendicular to the first direction, and a circuit layer on at least one of opposite surfaces of the at least one prepreg. The at least one prepreg has a length in the first direction greater than a length in the second direction, each of the plurality of first fibers is formed of or includes a filling yarn, and each of the plurality of second fibers is formed of or includes a warp yarn.

Abstract: A circuit board includes at least one prepreg including a fiber layer, the fiber layer being woven with a plurality of first fibers arranged in a first direction and a plurality of second fibers arranged in a second direction that is substantially perpendicular to the first direction, and a circuit layer on at least one of opposite surfaces of the at least one prepreg. The at least one prepreg has a length in the first direction greater than a length in the second direction, each of the plurality of first fibers is formed of or includes a filling yarn, and each of the plurality of second fibers is formed of or includes a warp yarn.

Abstract: The method includes disposing semiconductor chips on a package substrate having sawing lines, forming an encapsulant to cover the semiconductor chips on the package substrate, forming a package assembly by a first curing of the encapsulant, forming first grooves by cutting the encapsulant along the sawing lines, performing a second curing of the encapsulant, and dividing the package assembly into unit semiconductor packages by cutting the package substrate along the sawing lines and forming second grooves to overlap the first grooves.

Abstract: Provided is a semiconductor package including a substrate, a first semiconductor chip disposed on the substrate to have a rectangular shape with long and short sides, and a second semiconductor chip disposed on the first semiconductor chip to have a rectangular shape with long and short sides. Centers of the first and second semiconductor chips may be located at substantially the same position as that of the substrate, and the long side of the first semiconductor chip may be substantially parallel to a diagonal line of the substrate. Further, the long side of the second semiconductor chip may be not parallel to that of the first semiconductor chip.

Abstract: The method includes disposing semiconductor chips on a package substrate having sawing lines, forming an encapsulant to cover the semiconductor chips on the package substrate, forming a package assembly by a first curing of the encapsulant, forming first grooves by cutting the encapsulant along the sawing lines, performing a second curing of the encapsulant, and dividing the package assembly into unit semiconductor packages by cutting the package substrate along the sawing lines and forming second grooves to overlap the first grooves.

Abstract: Disclosed are a supporting substrate for manufacturing a flexible information display device capable of easily separating the flexible information display device from the supporting substrate without deforming or damaging the flexible information display device, a manufacturing method thereof, and a flexible information display device manufactured thereby. The supporting substrate for manufacturing a flexible information display device includes: a coating layer formed therein with a plurality micro-protrusions formed on the supporting substrate; and a temporary bonding/debonding layer formed on the coating layer and including an adhesive material mechanically interlocked with and bonded to the supporting substrate through Van der Waals bonding force.

Abstract: Disclosed are a supporting substrate for manufacturing a flexible information display device using a temporary bonding/debonding layer, a manufacturing method thereof, and a flexible information display device. A supporting substrate for manufacturing a flexible information display device, the supporting substrate comprising: a temporary bonding/debonding layer having a thickness in a range of 0.1 nm to 1000 nm and comprising an adhesive material bonded to the supporting substrate through Van der Waals bonding force. Provided is a method capable of economically manufacturing the display device having a high resolution while reviewing a cost competitive force by reducing a device investment cost and improving the yield rate in the flexible flat panel information display device.

Abstract: A semiconductor package, comprising: a substrate; a first semiconductor chip disposed on the substrate and having a rectangular shape with a long side and a short side; and a second semiconductor chip disposed on the first semiconductor chip and having a rectangular shape with a long side and a short side. The long side of the first semiconductor chip and the long side of the second semiconductor chip are rotated relative to each other; and an angle between the long side of the first semiconductor chip and the long side of the second semiconductor chip is greater than 45 degrees and less than 135 degrees.

Abstract: A semiconductor package includes one or more semiconductor chips to form a semiconductor package. The semiconductor package may include a first semiconductor chip package having a first substrate including a first surface having a center portion on which a first semiconductor chip is mounted, at least one first boundary portion on which a plurality of conductive connection pad groups are formed, and/or a molding member including a body that covers the first semiconductor chip and at least one extension that extends from the body. The extension extends while avoiding the conductive connection pad group. The semiconductor package may further include a second semiconductor chip package stacked on the first semiconductor chip package and including a second substrate on which at least one second semiconductor chip that is electrically connected to the conductive connection pad group may be mounted.

Abstract: A semiconductor module preferably includes a semiconductor package and a printed circuit board (PCB). The semiconductor package can include an outer terminal. The PCB can include a terminal land that is electrically connected to the outer terminal. The PCB preferably has a recess configured to at least partially expose the terminal land and to receive the outer terminal. The recess preferably has a width that is less than a width of the semiconductor package. Damage to edge portions of the semiconductor package whose outer terminal is received into the recess may be prevented, because the edge portions make contact with and are supported by the PCB. One or more support members can also be provided to contact one or more sides of the edge portions of the semiconductor package to further prevent damage due to horizontal impacts.

Abstract: Provided is a semiconductor package, which may include a plurality of semiconductor chips to form a multi-stack semiconductor package (MSP), a method of fabricating the semiconductor package and the MSP, and a semiconductor package mold for fabricating the semiconductor package. The semiconductor package may include a first semiconductor chip package having a first substrate including a first surface having a center portion on which a first semiconductor chip is mounted, and at least one first boundary portion on which a plurality of conductive connection pad groups are formed, and a molding member including a body that covers the first semiconductor chip, and at least one extension that extends from the body towards a corner portion of the first surface of the first substrate, wherein the extension extends while avoiding the conductive connection pad group.

Abstract: A semiconductor module preferably includes a semiconductor package and a printed circuit board (PCB). The semiconductor package can include an outer terminal. The PCB can include a terminal land that is electrically connected to the outer terminal. The PCB preferably has a recess configured to at least partially expose the terminal land and to receive the outer terminal. The recess preferably has a width that is less than a width of the semiconductor package. Damage to edge portions of the semiconductor package whose outer terminal is received into the recess may be prevented, because the edge portions make contact with and are supported by the PCB. One or more support members can also be provided to contact one or more sides of the edge portions of the semiconductor package to further prevent damage due to horizontal impacts.

Abstract: Provided is a stacked ball grid array (BGA) semiconductor package. The stacked BGA semiconductor package includes: a single semiconductor package having landings provided in depressed grooves of both sides thereof, wherein the landings include a conductive material, and a substrate having a semiconductor chip disposed on the substrate; another semiconductor package formed above the single semiconductor package and having landing pads formed in a lower surface of the substrate thereof; and solder balls connecting the landing pads to the landings.