Abstract: Programmed overcurrent protection control apparatus with selectable time-overcurrent operation to govern the interruption of current through at least one power line associated with either a ground phase or a power phase of a power system network is disclosed. A programmed processor is included to derive an overcurrent time-to-trip in accordance with sampled measurement current values of the power line and selected derivation constants stored in a memory look-up table. The derivation constants are selected from the look-up table based on derivation parameters which may be set and read by the programmed processor from time to time. The programmed processor utilizes the selected derivation constants to derive the time-to-trip over a number of predetermined time intervals during which the overcurrent condition persists.

Abstract: Method and apparatus for monitoring the time rate of successive events the rate of occurrence of which can vary over a wide range by: detecting the successive events during a succession of consecutive time intervals of equal duration; producing successive counts each representing the number of events occurring during each interval in which at least one event occurs; producing successive counts each representing the number of intervals between the end of a respective interval in which at least one event occurred and the end of the immediately preceding interval in which at least one event occurred; and storing representations of the successive counts produced.

Abstract: A system for detecting a fault in the program execution of a programmed digital signal processing system is disclosed. The fault detection system may include a plurality of monitoring devices for monitoring the execution of a plurality of program portions of the programmed processor and for generating a fault signal in response to a detected faulty program execution condition. Logic circuitry is included for restarting of suspending any fault signal generation rendered by the plurality of monitoring devices. Further included is circuitry for limiting the number of automatic restarts to a predetermined number which avoids continuous cycling between fault signal generation and reset. Still further, the predetermined number of fault generations must occur within a given time interval which may be set and from time to time changed by the program instructions, for example.

Abstract: A bus differential relay which is capable of distinguishing between an internal bus fault and an external fault on a feeder line with saturation of the faulted feeder line current transformer during portions of the alternating current cycles thereof is disclosed. The relay generates a net current signal or differential signal from the signals generated by the feeder line current transformers of the protected bus section. During an internal fault, the current differential signal extends in amplitude beyond fault current limits and a trip signal is generated to interrupt current to the bus section. During an external fault with current transformer saturation, the current differential signal will include amplitude portions of the alternating current cycles which exceed the fault limits.

Abstract: An apparatus and method for removing a transient exponential noise signal from a sinusoidal signal. The effects of the transient are removed by sampling the sinusoidal signal, averaging the transient over a time interval corresponding to an integral number of cycles of the sinusoidal signal, and subtracting this average from the sample at the midpoint of the time interval. The result is a compensated sinusoidal signal wherein the effects of the transient have been removed. The time interval is progressively moved ahead to produce a complete compensated signal by subtracting the average of the exponential from the value thereof at the midpoint of each successive time interval.

Abstract: A capacitor unit including a capacitive element connected in parallel with a discharge resistor is provided with a switch in series with the resistor. This switch responds to power frequency current flowing through the capacitive element such that it opens to remove the discharge resistor from the circuit when power frequency current is flowing through the capacitor unit and closes when power frequency current stops, thus reinserting the discharge resistor to eliminate any residual charge remaining on the capacitive element.