Patents by Inventor Shabbir Husain Batterywala

Shabbir Husain Batterywala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Legalizing a multi-patterning integrated circuit layout
    Patent number: 9904755
    Abstract: In a method for legalizing a multi-patterning integrated circuit layout including a plurality of islands, a set of multi-patterning constraints is generated on the basis of multi-patterning conflicts identified between the plurality of islands. Based on general design rule constraints and the multi-patterning constraints a combined set of layout constraints is generated. Feasibility of the set of layout constraints is checked, which then is provided to a Linear Program solver for generating an output circuit layout.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 27, 2018
    Assignee: Synopsys, Inc.
    Inventors: Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir Husain Batterywala
  • Automatic layout modification tool with non-uniform grids
    Patent number: 9898567
    Abstract: A method (and system) of automatically legalizing a circuit layout with layout objects in a presence of a plurality of non-uniform grids is disclosed. The method comprises generating a set of layout constraints comprising design rule constraints and gridding requirements based on the plurality of non-uniform grids. In addition, the method comprises processing the set of layout constraints to a feasible form using Boolean variables by determining infeasibility of the set of layout constraints, identifying infeasible layout constraints from the set of layout constraints, and resolving the infeasibility by a constraint relaxation process. Additionally, the method comprises generating an output circuit layout, for display to a user, by solving the set of layout constraints in the feasible form with standard linear program solvers.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: February 20, 2018
    Assignee: Synopsys, Inc.
    Inventors: Nitin Dileep Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir Husain Batterywala
  • AUTOMATIC LAYOUT MODIFICATION TOOL WITH NON-UNIFORM GRIDS
    Publication number: 20150248514
    Abstract: A method (and system) of automatically legalizing a circuit layout with layout objects in a presence of a plurality of non-uniform grids is disclosed. The method comprises generating a set of layout constraints comprising design rule constraints and gridding requirements based on the plurality of non-uniform grids. In addition, the method comprises processing the set of layout constraints to a feasible form using Boolean variables by determining infeasibility of the set of layout constraints, identifying infeasible layout constraints from the set of layout constraints, and resolving the infeasibility by a constraint relaxation process. Additionally, the method comprises generating an output circuit layout, for display to a user, by solving the set of layout constraints in the feasible form with standard linear program solvers.
    Type: Application
    Filed: February 23, 2015
    Publication date: September 3, 2015
    Inventors: NITIN DILEEP SALODKAR, SUBRAMANIAN RAJAGOPALAN, SAMBUDDHA BHATTACHARYA, SHABBIR HUSAIN BATTERYWALA
  • Legalizing a Multi-patterning Integrated Circuit Layout
    Publication number: 20150095865
    Abstract: In a method for legalizing a multi-patterning integrated circuit layout including a plurality of islands, a set of multi-patterning constraints is generated on the basis of multi-patterning conflicts identified between the plurality of islands. Based on general design rule constraints and the multi-patterning constraints a combined set of layout constraints is generated. Feasibility of the set of layout constraints is checked, which then is provided to a Linear Program solver for generating an output circuit layout.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Inventors: Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir Husain Batterywala