Patents by Inventor SHAHAB ARDALAN
SHAHAB ARDALAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240061181Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.Type: ApplicationFiled: October 31, 2023Publication date: February 22, 2024Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
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Patent number: 11867944Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.Type: GrantFiled: March 22, 2022Date of Patent: January 9, 2024Assignee: Ayar Labs, Inc.Inventors: Roy Edward Meade, Chen Sun, Shahab Ardalan, John Fini, Forrest Sedgwick
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Patent number: 11822128Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.Type: GrantFiled: November 1, 2021Date of Patent: November 21, 2023Assignee: Ayar Labs, Inc.Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
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Publication number: 20230224047Abstract: An optical power supply includes a plurality of lasers in a laser array. Each of the plurality of lasers is configured to generate a separate beam of continuous wave laser light. The optical power supply includes a temperature sensor that acquires a temperature associated with the laser array. The optical power supply includes a digital controller that receives notification of the temperature from the temperature senor. The optical power supply includes an optical power adjuster controlled by the digital controller. The optical power adjuster adjusts an optical power level of one or more beams of continuous wave laser light generated by the plurality of lasers to produce an optical power encoding that conveys information about the temperature associated with the laser array as acquired by the temperature sensor. An electro-optic chip receives the beams of continuous wave laser light from the optical power supply and decodes the optical power encoding.Type: ApplicationFiled: January 10, 2023Publication date: July 13, 2023Inventors: Matthew Sysak, Chen Sun, Shahab Ardalan, Daniel Jeong, Songtao Liu
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Publication number: 20220214497Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.Type: ApplicationFiled: March 22, 2022Publication date: July 7, 2022Inventors: Roy Edward Meade, Chen Sun, Shahab Ardalan, John Fini, Forrest Sedgwick
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Patent number: 11323181Abstract: A bidirectional transceiver includes a transmitter and a receiver that respectively transmits a local signal to and receives remote signal from a common bidirectional communication channel, thus the bidirectional channel signal is the superimposition of the local and remote signals. The bidirectional transceiver also includes a transmit canceller that substantially removes the local transmitted signal from the superimposed signals on the bidirectional channel before the local receiver. The remote signal is transmitted by a remote transceiver over the bidirectional channel. A sampling phase is set, based on timing information in the received remote signal, and the received signal is sampled. Timing relation of transitions in the local transmit signal relative to the receiver sampling phase is set such that transmit signal cancellation is optimum at receiver sampling phase, by changing the delay applied to the local transmit signal.Type: GrantFiled: July 2, 2019Date of Patent: May 3, 2022Assignee: Radin GlobalInventor: Shahab Ardalan
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Publication number: 20220107463Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.Type: ApplicationFiled: November 1, 2021Publication date: April 7, 2022Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
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Patent number: 11280959Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.Type: GrantFiled: April 23, 2020Date of Patent: March 22, 2022Assignee: Ayar Labs, Inc.Inventors: Roy Edward Meade, Chen Sun, Shahab Ardalan, John Fini, Forrest Sedgwick
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Patent number: 11163120Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.Type: GrantFiled: November 15, 2019Date of Patent: November 2, 2021Assignee: Ayar Labs, Inc.Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
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Publication number: 20200341191Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.Type: ApplicationFiled: April 23, 2020Publication date: October 29, 2020Inventors: Roy Edward Meade, Chen Sun, Shahab Ardalan, John Fini, Forrest Sedgwick
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Publication number: 20200158959Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.Type: ApplicationFiled: November 15, 2019Publication date: May 21, 2020Inventors: Shahab Ardalan, Michael Davenport, Roy Edward Meade
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Publication number: 20190326994Abstract: A bidirectional transceiver includes a transmitter and a receiver that respectively transmits a local signal to and receives remote signal from a common bidirectional communication channel, thus the bidirectional channel signal is the superimposition of the local and remote signals. The bidirectional transceiver also includes a transmit canceller that substantially removes the local transmitted signal from the superimposed signals on the bidirectional channel before the local receiver. The remote signal is transmitted by a remote transceiver over the bidirectional channel. A sampling phase is set, based on timing information in the received remote signal, and the received signal is sampled. Timing relation of transitions in the local transmit signal relative to the receiver sampling phase is set such that transmit signal cancellation is optimum at receiver sampling phase, by changing the delay applied to the local transmit signal.Type: ApplicationFiled: July 2, 2019Publication date: October 24, 2019Inventor: Shahab Ardalan
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Patent number: 10361786Abstract: A bidirectional transceiver includes a transmitter and a receiver that respectively transmits a local signal to and receives remote signal from a common bidirectional communication channel, thus the bidirectional channel signal is the superimposition of the local and remote signals. The bidirectional transceiver also includes a transmit canceller that substantially removes the local transmitted signal from the superimposed signals on the bidirectional channel before the local receiver. The remote signal is transmitted by a remote transceiver over the bidirectional channel. A sampling phase is set, based on timing information in the received remote signal, and the received signal is sampled. Timing relation of transitions in the local transmit signal relative to the receiver sampling phase is set such that transmit signal cancellation is optimum at receiver sampling phase, by changing the delay applied to the local transmit signal.Type: GrantFiled: October 5, 2016Date of Patent: July 23, 2019Inventor: Shahab Ardalan
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Publication number: 20150063349Abstract: An improvement to the prior-art extends an intelligent solution beyond simple IP packet switching. It intersects with computing, analytics, storage and performs delivery diversity in an efficient intelligent manner. A flexible programmable network is enabled that can store, time shift, deliver, process, analyze, map, optimize and switch flows at hardware speed. Multi-layer functions are enabled in the same node by scaling for diversified data delivery, scheduling, storing, and processing at much lower cost to enable multi-dimensional optimization options and time shift delivery, protocol optimization, traffic profiling, load balancing, and traffic classification and traffic engineering. An integrated high performance flexible switching fabric has integrated computing, memory storage, programmable control, integrated self-organizing flow control and switching.Type: ApplicationFiled: August 27, 2013Publication date: March 5, 2015Inventors: SHAHAB ARDALAN, Mona Mojdeh