Abstract: Circuitry that efficiently implements loop functions in an integrated circuit is provided. The circuitry combines a feed-forward circuit with a feedback loop that includes a unit delay element in a feedback path. The feedback path may couple the output of a processing element to the input of the processing element. The processing element may implement a function that satisfies commutative, associative, and distributive properties. Combining the feedback loop with the feed-forward circuit may allow for register retiming in the feedback loop and for register pipelining with optional register retiming in the feed-forward circuit. The circuitry may thus trade off an increase in throughput and clock frequency for additional resources.

Abstract: Integrated circuits with wireless communications circuitry having peak cancelation circuitry operable to perform crest factor reduction is provided. The peak cancelation circuitry may receive at least first and second carrier waveforms and may include at least a first canceling pulse generator (CPG), a second CPG, a first peak detector for performing peak detection on the first waveform, a second peak detector for performing peak detection on the second waveform, a third peak detector for performing peak detection on a combined waveform of the first and second waveforms, and a pulse allocator that receives clipping information from the three peak detectors and that controls the amount of peak cancelation that is being performed by the two CPGs. The allocator may determine whether the combined waveform contains any peaks. In response to determining that the combined waveform does not contain any peaks, the CPGs may be configured in bypass mode.

Abstract: Integrated circuits are provided with wireless communications circuitry having digital predistortion (DPD) circuitry, peak canceling circuitry, a power amplifier, and signal conditioning circuitry for controlling the DPD and peak canceling circuitry. The peak canceling circuitry may receive transmit signals and may clip peaks in the transmit signals that exceed a magnitude threshold value. The DPD circuitry may compensate for non-linear characteristics of the power amplifier by outputting a predistorted version of the clipped transmit signals. The power amplifier may receive the predistorted signals and may perform amplification to generate amplified signals. The signal conditioning circuitry may identify power transfer characteristics of the power amplifier and DPD circuitry using the predistorted signals and the amplified signals.

Abstract: Integrated circuits with wireless communications circuitry having digital predistortion (DPD) circuitry are provided. The digital predistortion circuitry may include a forward path filter, a time domain alignment (TDA) circuit, a frequency domain alignment (FDA) circuit, and an adaption circuit. The TDA circuit may receive power amplifier input signals and power amplifier output signals and may include a cross correlator, a peak detector, and a delay circuit for performing coarse time domain alignment (i.e., to align the power amplifier input and output signals). The FDA circuit may include a fast Fourier transform circuit, a matrix multiplier, and a matrix inverter for performing frequency domain alignment. The adaption circuit may analyze the aligned signals output from the FDA circuit to produce impulse response coefficients that are then used to control the forward path filter. The forward path filter may serve to predistort transmit signals prior to radio-frequency amplification.

Abstract: A method, circuit, and a system for performing digital predistortion are disclosed. Digital predistortion may be used to compensate for or null the distortion caused by power amplifiers. The distortion of power amplifiers is usually larger at higher magnitudes or powers, and therefore, a larger percentage of the samples collected for the digital predistortion may be of higher magnitude or power. At least one sample of lower magnitude or power may be ignored or not collected. Accordingly, fewer samples can be used to perform digital predistortion, thereby allowing digital predistortion to be performed more quickly and efficiently with fewer resources.