Abstract: The present disclosure provides LED drivers and methods for driving LED matrixes in response to display signals. According to one exemplary embodiment, an LED driver is provided. The LED driver includes a two-dimensional pulse profile engine that receives display signals and timing signals, and produces a pulse profile defining signal amplitudes at various times during a driving pulse to produce a desired LED output that accounts for artifacts of the LED matrix and other driver circuitry. The LED driver further includes current forming circuitry and driver circuitry. The current forming circuitry can be configured to form a driving pulse to reflect the pulse profile. The driver circuitry can be coupled to the two-dimensional pulse profile engine and the current forming circuitry for forming a current pulse to one or more LEDs in the matrix.

Abstract: A clock synthesis circuit and method provides for precision controlling and programming a selected number of clock pulses (or simply “clocks”) fitted within time periods between two consecutive pulses of a so-called system heartbeat (SHB) timing signal. The disclosed embodiments have applicability in light emitting diode (LED) display driver integrated circuits (ICs) and, more generally, digital circuits including computer processors, microcontrollers, logic devices such as field-programmable gate arrays (FP-GA), and other logic circuitry.

Abstract: Active discharge circuitry for fast discharging of charge on an LED display matrix includes a mechanism to effectuate circuit path switching so as to electrically connect a charged node to a discharge circuit for controlled discharging of unwanted charge until it reaches a desired (e.g., programmable) value. The active discharge circuitry includes a control circuit generating appropriate timing and digital control signals for starting and stopping (e.g., actuating a switch) the discharge activities. The disclosed techniques accommodate variations in channel-to-channel start times for mitigating ghosting effects that would otherwise be presented from the LED display matrix due to residual (i.e., unwanted) charges remaining electrically loaded on display elements via, for example, charged parasitic capacitance or other such transients, after a current driver of a specific channel has stopped driving.

Abstract: A current controller for an output stage of light emitting diode (LED) driver circuitry includes a current source establishing a nominal amount of current available for each member of the set of channels. The nominal amount of current is based on, e.g., a desired brightness level. Pulse width modulation (PWM) circuitry is electrically coupled to the current source and is configured to control durations in which adjusted amounts of current are applied to corresponding members the set of LEDs. Compensation circuitry is electrically coupled to the current source and the PWM circuitry. The compensation circuitry includes a set of switching elements to adjust, for each corresponding member of the set of LEDs, the nominal amount of current and thereby provide to the PWM circuitry the adjusted amounts of current based on feedback representing one or both load impedance variations and parasitic conditions (LIVPC) and process, voltage and temperature (PVT) conditions.

Abstract: Active discharge circuitry for fast discharging of charge on an LED display matrix includes a mechanism to effectuate circuit path switching so as to electrically connect a charged node to a discharge circuit for controlled discharging of unwanted charge until it reaches a desired (e.g., programmable) value. The active discharge circuitry includes a control circuit generating appropriate timing and digital control signals for starting and stopping (e.g., actuating a switch) the discharge activities. The disclosed techniques accommodate variations in channel-to-channel start times for mitigating ghosting effects that would otherwise be presented from the LED display matrix due to residual (i.e., unwanted) charges remaining electrically loaded on display elements via, for example, charged parasitic capacitance or other such transients, after a current driver of a specific channel has stopped driving.

Abstract: A current controller for an output stage of light emitting diode (LED) driver circuitry includes a current source establishing a nominal amount of current available for each member of the set of channels. The nominal amount of current is based on, e.g., a desired brightness level. Pulse width modulation (PWM) circuitry is electrically coupled to the current source and is configured to control durations in which adjusted amounts of current are applied to corresponding members the set of LEDs. Compensation circuitry is electrically coupled to the current source and the PWM circuitry. The compensation circuitry includes a set of switching elements to adjust, for each corresponding member of the set of LEDs, the nominal amount of current and thereby provide to the PWM circuitry the adjusted amounts of current based on feedback representing one or both load impedance variations and parasitic conditions (LIVPC) and process, voltage and temperature (PVT) conditions.

Abstract: A clock synthesis circuit and method provides for precision controlling and programming a selected number of clock pulses (or simply “clocks”) fitted within time periods between two consecutive pulses of a so-called system heartbeat (SHB) timing signal. The disclosed embodiments have applicability in light emitting diode (LED) display driver integrated circuits (ICs) and, more generally, digital circuits including computer processors, microcontrollers, logic devices such as field-programmable gate arrays (FP-GA), and other logic circuitry.

Abstract: A circuit for driving at least one light emitting diode (LED) of a display based on a greyscale vector. The circuit includes brightness scale detection circuitry to determine a brightness value based on the greyscale vector and refresh cycle selection circuitry to output an indication of a subset of refresh cycles, referred to as dithered refresh cycles. The circuit also includes pulse width determination circuitry to define a pulse width based on the greyscale vector. Pulse adjustment control circuitry, for each dithered refresh cycle, determines a dithered pulse width by adjusting the pulse width by a width adjustment amount, and outputs a dithered pulse width modulation signal including a series of pulses including a pulse having the pulse width determined by the pulse width determination circuitry non-dithered refresh cycles and a pulse having the dithered pulse width for the dithered refresh cycles.

Abstract: A circuit for driving at least one light emitting diode (LED) of a display based on a greyscale vector. The circuit includes brightness scale detection circuitry to determine a brightness value based on the greyscale vector and refresh cycle selection circuitry to output an indication of a subset of refresh cycles, referred to as dithered refresh cycles. The circuit also includes pulse width determination circuitry to define a pulse width based on the greyscale vector. Pulse adjustment control circuitry, for each dithered refresh cycle, determines a dithered pulse width by adjusting the pulse width by a width adjustment amount, and outputs a dithered pulse width modulation signal including a series of pulses including a pulse having the pulse width determined by the pulse width determination circuitry non-dithered refresh cycles and a pulse having the dithered pulse width for the dithered refresh cycles.

Abstract: The present disclosure provides devices, circuits, and methods for driving an LED display panel, so as to ensure the delivery of equal global charge at minimum gray scale. In one example, the circuit of the present disclosure includes a current source, a detection module, and a measurement module. The current source is configured to generate a current signal for the LEDs. The detection module is configured to detect a forward voltage of the LEDs in response to a low current applied to the LEDs. The detection module is further configured to hold the detected forward voltage. The measurement module is configured to measure a time period for an anode voltage of the LEDs to rise to the detected forward voltage in response to a display current applied to the LEDs.

Abstract: A display device includes a printed circuit board (PCB) having a plurality of light emitting members, an anti-moiré member spaced away from the plurality of light emitting members at about a first distance (d), and a frame member receiving the PCB such that the PCB is interposed between the anti-moiré and the frame member. The anti-moiré member includes a first layer disposed to face the PCB and having a first foil with a randomized pattern surface. The first distance (d) equals L/(2*tan (?)). The second distance (L) is a shortest distance between two adjacent light emitting members. Each of the array of light emitting members has a radiation angle ?.

Abstract: The present disclosure provides devices, circuits, and methods for driving an LED display panel, so as to ensure the delivery of equal global charge at minimum gray scale. In one example, the circuit of the present disclosure includes a current source, a detection module, and a measurement module. The current source is configured to generate a current signal for the LEDs. The detection module is configured to detect a forward voltage of the LEDs in response to a low current applied to the LEDs. The detection module is further configured to hold the detected forward voltage. The measurement module is configured to measure a time period for an anode voltage of the LEDs to rise to the detected forward voltage in response to a display current applied to the LEDs.

Abstract: The present disclosure provides devices, circuits, and methods for driving an LED display panel, so as to ensure the delivery of equal global charge at minimum gray scale. In one example, the circuit of the present disclosure includes a current source, a detection module, and a measurement module. The current source is configured to generate a current signal for the LEDs. The detection module is configured to detect a forward voltage of the LEDs in response to a low current applied to the LEDs. The detection module is further configured to hold the detected forward voltage. The measurement module is configured to measure a time period for an anode voltage of the LEDs to rise to the detected forward voltage in response to a display current applied to the LEDs.

Abstract: A display device includes a printed circuit board (PCB) having a plurality of light emitting members, an anti-moiré member spaced away from the plurality of light emitting members at about a first distance (d), and a frame member receiving the PCB such that the PCB is interposed between the anti-moiré and the frame member. The anti-moiré member includes a first layer disposed to face the PCB and having a first foil with a randomized pattern surface. The first distance (d) equals L/(2*tan (?)). The second distance (L) is a shortest distance between two adjacent light emitting members. Each of the array of light emitting members has a radiation angle ?.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: The present disclosure provides a circuit for discharging parasitic capacitance in a display panel with common-anode topology having a plurality of light emitters, as well as a circuit for charging parasitic capacitance in a display panel with common-cathode topology. In the common-cathode topology, the circuit includes a three-terminal device having a gate, a source, and a drain, wherein one of the source and the drain is electrically coupled to a common cathode of the light emitters, and a mechanism for controlling the three-terminal device, the mechanism being electrically coupled to the gate. Shortly after a previously selected light emitter is unselected, the mechanism turns on the three-terminal device to form a conductive path between the source and the drain. The mechanism turns off the three-terminal device after a voltage at the common cathode is increased to a predetermined voltage level or after a maximum period of time lapses.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a gain adjustable fast charge current source, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Abstract: An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.