Patents by Inventor Shailesh Shah

Shailesh Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5565505
    Abstract: A self-dispersing curable epoxy composition is prepared upon contacting (a) 1.0 reactive equivalents of an epoxy resin, (b) from about 0.01 to 1.0 reactive equivalents of a polyhydric phenol, and (c) between 0.005 and 0.025 reactive equivalents of an amine-epoxy adduct, wherein the amine-epoxy adduct is formed upon contacting 1.0 equivalents of an aliphatic polyepoxide and between 0.3 and 0.9 reactive equivalents of a polyoxyalkyleneamine. The self-dispersing curable epoxy resin forms an aqueous dispersion upon mixing with water. When cured, the dispersion is useful as a coating composition.
    Type: Grant
    Filed: June 14, 1994
    Date of Patent: October 15, 1996
    Assignee: Henkel Corporation
    Inventors: John G. Papalos, Reuben H. Grinstein, Shailesh Shah, Joseph L. Mulvey, Brian G. Jewell
  • Patent number: 5565506
    Abstract: A self-dispersing curable epoxy composition is prepared upon contacting (a) 1.0 reactive equivalents of an epoxy resin, (b) from about 0.65 to 0.95 reactive equivalents of a polyhydric phenol, and (c) between 0.005 and 0.5 reactive equivalents of an amine-epoxy adduct, wherein the amine-epoxy adduct is formed upon contacting 1.0 equivalents of an aliphatic polyepoxide and between 0.3 and 0.9 reactive equivalents of a polyoxyalkyleneamine. The self-dispersing curable epoxy resin forms an aqueous dispersion upon mixing with water. When cured, the dispersion is useful as a coating composition.
    Type: Grant
    Filed: August 25, 1994
    Date of Patent: October 15, 1996
    Assignee: Henkel Corporation
    Inventors: John G. Papalos, Reuben H. Grinstein, Shailesh Shah, Joseph L. Mulvey, Brian G. Jewell
  • Patent number: 5559465
    Abstract: An output preconditioning circuit with an output level latch is provided to precondition the output to an intermediate level and to clamp the output to that level before the actual data from a memory cell arrives at the output. Since the actual data has to charge or discharge the output from some intermediate level rather than the maximum output swing level or the minimum output swing level, as in the normal case, this results in a reduced delay in charging or discharging the output. The output preconditioning circuit which may be coupled to a heavy load or a light load can eliminate oscillation of the output because of the output level latch.
    Type: Grant
    Filed: July 29, 1994
    Date of Patent: September 24, 1996
    Assignee: Cypress Semiconductor Corporation
    Inventor: Shailesh Shah
  • Patent number: 5508373
    Abstract: A method of curing an epoxy resin comprising mixing an epoxy resin with a curing agent is provided. The curing agent is selected from the group consisting of (i) a mixture consisting essentially of 1,2-diaminocyclohexane and an aliphatic polyamine (preferably at a molar ratio of 1,2-diaminocyclohexane to aliphatic polyamine of from about 1:1 to about 16:1, preferably about 2.5:1 to about 6:1 and more preferably about 3:1 to about 5:1) and (ii) the reaction product of reactants consisting essentially of an amine component consisting essentially of 1,2-diaminocyclohexane and an aliphatic polyamine and an epoxide component. The epoxide component has an epoxy functionality greater than one and is preferably a diglycidyl ether of an aromatic diol having an average degree of oligomerization of less than about 3.5., preferably less than about 1.5, and preferably derived from an alkyl bis-phenol, e.g. bisphenol A.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: April 16, 1996
    Assignee: Henkel Corporation
    Inventors: Shailesh Shah, Robert M. Moon
  • Patent number: 5490115
    Abstract: A computer memory system incorporates a gang write circuit block to reduce the number of clock cycles required write a background pattern to memory cells during a memory test operation. The computer memory system includes (1) a two-dimensional array having multiple memory cells arranged in M rows and N columns and (2) the gang write circuit block for writing to N memory cells located in a row during one cycle and for writing to all of the memory cells in M cycles. The gang write circuit block may include two inverters for each column of the memory array and two test signals for the inverters. The background pattern may be all 1's, all 0's or some combination of 1's and 0's. The gang write circuit block becomes inactive during a normal read and write operation. When all the word lines of the computer memory system are selected, all the memory cells are written simultaneously.
    Type: Grant
    Filed: July 29, 1994
    Date of Patent: February 6, 1996
    Assignee: Cypress Semiconductor Corp.
    Inventors: Shailesh Shah, Gregory J. Landry
  • Patent number: 4575376
    Abstract: Method for increasing the absorbency of cellulosic fibers by a high temperature wet treatment comprising heating the fibers in a water bath at temperatures within the range of about 95.degree. C. to 100.degree. C. for periods ranging from about one to sixty minutes. Absorbency of the treated fibers is thus increased by more than 2% of the corresponding untreated fibers as measured by the Syngyna Test Method. By employing such materials in catamenial tampons, sanitary napkins or the like, the amount of absorbent material may be decreased by 10% or more relative to the corresponding, untreated absorbent material, without adversely affecting the absorbent characteristics thereof.
    Type: Grant
    Filed: November 7, 1983
    Date of Patent: March 11, 1986
    Assignee: International Playtex
    Inventors: Shailesh Shah, David R. King, Nathan D. Field