Abstract: A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

Abstract: A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

Abstract: A system, such as a heat exchange assembly includes a support structure having a recess, a first support end, a second support end, and a support portion extending between the first and second support ends. The support structure further includes a plurality of projections protruding from a portion of a surface of the support structure, corresponding to the support portion. The support structure is a primary heat sink. The heat exchange assembly includes a vapor chamber having a casing and a wick disposed within the casing. The vapor chamber is disposed within the recess and coupled to a surface of the support structure such that the plurality of projections surrounds the vapor chamber. The casing includes a mid projected portion disposed at an evaporator portion of the vapor chamber. The first and second support ends, and the mid projected portion include a non-uniform surface configured to contact the circuit card.

Abstract: A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

Abstract: A wireless communication device having a first SIM and a second SIM and a radio frequency (RF) resource including multiple receive chains and at least one transmit chain may detect, during a connection to a first network associated with the first SIM, a start of a communication activity associated with the second SIM that uses one or more transmit chains and one or more of the receive chains. The wireless communication device may determine whether a carrier frequency of a cell serving the network associated with the first SIM is within a downlink frequency range supported by an unused receive chain of the RF resource. If not, the wireless communication device may identify a neighbor cell of the first network with a carrier frequency within a downlink frequency range supported by an unused receive chain of the RF resource, and attempt to camp the first SIM on that neighbor cell.

Abstract: A semiconductor device module includes a dielectric layer, a semiconductor device having a first surface coupled to the dielectric layer, and a conducting shim having a first surface coupled to the dielectric layer. The semiconductor device also includes an electrically conductive heatspreader having a first surface coupled to a second surface of the semiconductor device and a second surface of the conducting shim. A metallization layer is coupled to the first surface of the semiconductor device and the first surface of the conducting shim. The metallization layer extends through the dielectric layer and is electrically connected to the second surface of the semiconductor device by way of the conducting shim and the heatspreader.

Abstract: A semiconductor device module includes a dielectric layer, a semiconductor device having a first surface coupled to the dielectric layer, and a conducting shim having a first surface coupled to the dielectric layer. The semiconductor device also includes an electrically conductive heatspreader having a first surface coupled to a second surface of the semiconductor device and a second surface of the conducting shim. A metallization layer is coupled to the first surface of the semiconductor device and the first surface of the conducting shim. The metallization layer extends through the dielectric layer and is electrically connected to the second surface of the semiconductor device by way of the conducting shim and the heatspreader.

Abstract: A system and method for packaging light emitting semiconductors (LESs) is disclosed. An LES device is provided that includes a heatsink and an array of LES chips mounted on the heatsink and electrically connected thereto, with each LES chip comprising connection pads and a light emitting area configured to emit light therefrom responsive to a received electrical power. The LES device also includes a flexible interconnect structure positioned on and electrically connected to each LES chip to provide for control LES operation of the array of LES chips, with the flexible interconnect structure further including a flexible dielectric film configured to conform to a shape of the heatsink and a metal interconnect structure formed on the flexible dielectric film and that extends through vias formed in the flexible dielectric film so as to be electrically connected to the connection pads of the LES chips.

Abstract: A wireless communication device having a first SIM and a second SIM and a radio frequency (RF) resource including multiple receive chains and at least one transmit chain may detect, during a connection to a first network associated with the first SIM, a start of a communication activity associated with the second SIM that uses one or more transmit chains and one or more of the receive chains. The wireless communication device may determine whether a carrier frequency of a cell serving the network associated with the first SIM is within a downlink frequency range supported by an unused receive chain of the RF resource. If not, the wireless communication device may identify a neighbor cell of the first network with a carrier frequency within a downlink frequency range supported by an unused receive chain of the RF resource, and attempt to camp the first SIM on that neighbor cell.

Abstract: A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

Abstract: A system, such as a heat exchange assembly includes a support structure having a recess, a first support end, a second support end, and a support portion extending between the first and second support ends. The support structure further includes a plurality of projections protruding from a portion of a surface of the support structure, corresponding to the support portion. The support structure is a primary heat sink. The heat exchange assembly includes a vapor chamber having a casing and a wick disposed within the casing. The vapor chamber is disposed within the recess and coupled to a surface of the support structure such that the plurality of projections surrounds the vapor chamber. The casing includes a mid projected portion disposed at an evaporator portion of the vapor chamber. The first and second support ends, and the mid projected portion include a non-uniform surface configured to contact the circuit card.

Abstract: A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.

Abstract: A power overlay (POL) structure includes a POL sub-module. The POL sub-module includes a dielectric layer and a semiconductor device having a top surface attached to the dielectric layer. The top surface of the semiconductor device has at least one contact pad formed thereon. The POL sub-module also includes a metal interconnect structure that extends through the dielectric layer and is electrically coupled to the at least one contact pad of the semiconductor device. A conducting shim is coupled to a bottom surface of the semiconductor device and a first side of a thermal interface is coupled to the conducting shim. A heat sink is coupled to a second side of the electrically insulating thermal interface.

Abstract: A circuit card assembly includes a heat sink, a locking mechanism, and a thermal insert. The heat sink couples to a circuit board and has an upper surface and a lower surface. The heat sink has a channel extending downwards along the upper surface thereof. The locking mechanism is disposed within the channel and includes a plurality of solid wedges movably arranged within the channel. Movement of the wedges is effective to secure the circuit card assembly to a holder. The thermal insert is disposed within the heat sink and is an elongated member. The thermal insert is configured to contact a portion of at least one of the solid wedges, thus assisting in removing a first amount of thermal energy from the circuit board.

Abstract: A power overlay (POL) structure includes a POL sub-module. The POL sub-module includes a dielectric layer and a semiconductor device having a top surface attached to the dielectric layer. The top surface of the semiconductor device has at least one contact pad formed thereon. The POL sub-module also includes a metal interconnect structure that extends through the dielectric layer and is electrically coupled to the at least one contact pad of the semiconductor device. A conducting shim is coupled to a bottom surface of the semiconductor device and a first side of a thermal interface is coupled to the conducting shim. A heat sink is coupled to a second side of the electrically insulating thermal interface.

Abstract: A thermal interface device having a containment structure and a thermal conductor is provided. Further, the containment structure includes at least one wall, where the containment structure is configured to facilitate passage of heat. Furthermore, the thermal interface device includes a thermal conductor disposed at least in a portion of the containment structure. Moreover, the thermal conductor is configured to reversibly switch between a solid state and a liquid state. Also, the thermal interface device is a re-workable device.

Abstract: A semiconductor device module includes a dielectric layer, a semiconductor device having a first surface coupled to the dielectric layer, and a conducting shim having a first surface coupled to the dielectric layer. The semiconductor device also includes an electrically conductive heatspreader having a first surface coupled to a second surface of the semiconductor device and a second surface of the conducting shim. A metallization layer is coupled to the first surface of the semiconductor device and the first surface of the conducting shim. The metallization layer extends through the dielectric layer and is electrically connected to the second surface of the semiconductor device by way of the conducting shim and the heatspreader.

Abstract: Composite foams are provided including a metal template and a conformal atomic-scale film disposed over such metal template to form a 3-dimensional interconnected structure. The metal template includes a plurality of sintered interconnects, having a plurality of first non-spherical pores, a first non-spherical porosity, and a first surface-area-to-volume ratio. The conformal atomic-scale film has a plurality of second non-spherical pores, a second non-spherical porosity, and a second surface-area-to-volume ratio approximately equal to the first surface-area-to-volume ratio. The plurality of sintered interconnects has a plurality of dendritic particles and the conformal atomic-scale film includes at least one of a layer of graphene and a layer of hexagonal boron nitride.

Abstract: A package structure includes a dielectric layer, at least one semiconductor device attached to the dielectric layer, one or more dielectric sheets applied to the dielectric layer and about the semiconductor device(s) to embed the semiconductor device(s) therein, and a plurality of vias formed to the semiconductor device(s) that are formed in at least one of the dielectric layer and the one or more dielectric sheets. The package structure also includes metal interconnects formed in the vias and on one or more outward facing surfaces of the package structure to form electrical interconnections to the semiconductor device(s). The dielectric layer is composed of a material that does not flow during a lamination process and each of the one or more dielectric sheets is composed of a curable material configured to melt and flow when cured during the lamination process so as to fill-in any air gaps around the semiconductor device(s).

Abstract: A system for cooling electronic components. The system includes tubing having a central portion attachable to a heat source disposed within a sealed enclosure. Distal portions of the tubing extend outside the enclosure through walls thereof. The system also includes fins attachable to the distal portions.