Abstract: An exposure apparatus (10) for transferring a first mask pattern (29A) from a first mask (26A) and a second mask pattern (29B) from a second mask (26B) to a substrate (28) includes a first mask stage assembly (18A), a second mask stage assembly (18B), an illumination system (14A), a substrate stage assembly (20), and an optical assembly (16). The first mask stage assembly (18A) positions the first mask (26A). The second mask stage assembly (18B) positions the second mask (26B). The illumination system (14A) selectively generates a first illumination beam (32A) that is directed at the first mask (26A) to generate a first pattern beam (38A), and a second illumination beam (32B) that is directed at the second mask (26B) to generate a second pattern beam (38B). The substrate stage assembly (20) positions the substrate (28).

Abstract: A lithographic mask enables printing wafer features at very small to large pitch values with an increase in the depth of focus. The mask may include square or rectangular patterns for printing square or rectangular features, such as contacts or vias. The square or rectangular features include wings that aid in the transfer of the square or rectangular features. The mask may be used to print water features by exposing the mask to radiation with selective polarization.

Abstract: An improvement to the optical proximity correction process used in photolithography. Mask pattern modeling is added to the optical proximity correction process, producing patterns that are optimized for both reticle manufacture and wafer fabrication. Pattern validation is improved by applying a mask pattern model and a wafer pattern model to the validation process. Reticle inspection is improved by adding a mask inspection tool model that comprehends the limitations of the inspection tool.

Abstract: A method of performing and verifying an integrated circuit layout is provided that comprises the steps of performing the layout of a mask. Proximity correction techniques are then applied to the mask layout data. Theoretical contours which comprise curvilinear forms are then extrapolated from the corrected mask data set. The curvilinear contour data is then bounded using boxing algorithms in order to generate a bounded contour data set. The bounded contour data set can then be compared to the original input mask data to detect design rule violations and other characteristics of the original layout.

Abstract: A method of performing and verifying an integrated circuit layout is provided that comprises the steps of performing the layout of a mask. Proximity correction techniques are then applied to the mask layout data. Theoretical contours which comprise curvilinear forms are then extrapolated from the corrected mask data set. The curvilinear contour data is then bounded using boxing algorithms in order to generate a bounded contour data set. The bounded contour data set can then be compared to the original input mask data to detect design rule violations and other characteristics of the original layout.

Abstract: An improvement to the optical proximity correction process used in photolithography. Mask pattern modeling is added to the optical proximity correction process, producing patterns that are optimized for both reticle manufacture and wafer fabrication. Pattern validation is improved by applying a mask pattern model and a wafer pattern model to the validation process. Reticle inspection is improved by adding a mask inspection tool model that comprehends the limitations of the inspection tool.

Abstract: An apparatus and method for fabrication a hexagonally symmetric cell, (e.g., a dynamic random access memory cell (100)). The cell can comprise a bitline contact (38), storage node contacts (32) hexagonally surrounding the bitline contact (38), storage nodes (36) also surrounding the bitline contact (38), a wordline (30) portions of which form field effect transistor gates. Large distances between bitline contacts (38) and storage node contact (32) cause large problems during photolithography because dark areas are difficult to achieve when using Levenson Phaseshift. Because Levenson Phaseshift depends on wave cancellations between nearby features, commonly known as destructive interferences, the resultant printability of the pattern is largely a function of the symmetry and separation distances. When non-symmetries in the pattern occur, the result is weaker cancellations of fields (i.e. between features) and a large loss of image contrast and depth of focus during the printing step.

Abstract: An apparatus and method for fabrication a hexagonally symmetric cell, (e.g., a dynamic random access memory cell (100)). The cell can comprise a bitline contact (38), storage node contacts (32) hexagonally surrounding the bitline contact (38), storage nodes (36) also surrounding the bitline contact (38), a wordline (30) portions of which form field effect transistor gates. Large distances between bitline contacts (38) and storage node contacts (32) cause large problems during photolithography because dark areas are difficult to achieve when using Levenson Phaseshift. Because Levenson Phaseshift depends on wave cancellations between nearby features, commonly known as destructive interferences, the resultant printability of the pattern is largely a function of the symmetry and separation distances. When non-symmetries in the pattern occur, the result is weaker cancellations of fields (i.e. between features) and a large loss of image contrast and depth of focus during the printing step.

Abstract: A phase shift illuminator (700) is comprised of a light source (704) and a phase modulator (716), typically a flexure beam micromirror array, which transversely modulates the incident light beam. When a flexure beam micromirror array is used as the phase modulator (716) a polarizing beam splitter (712) and a quarter-wave plate (714) are used to separate the incident and reflected light beams. The phase modulated light beam (720) from the optical illuminator may be used in optical lithography by passing the light beam through a lithography mask (724), typically after the light beam is phase modulated, and focusing the light beam onto a target wafer (726).

Abstract: A phase shift illuminator (700) is comprised of a light source (704) and a phase modulator (716), typically a flexure beam micromirror array, which transversely modulates the incident light beam. When a flexure beam micromirror array is used as the phase modulator (716) a polarizing beam splitter (712) and a quarter-wave plate (714) are used to separate the incident and reflected light beams. The phase modulated light beam (720) from the optical illuminator may be used in optical lithography by passing the light beam through a lithography mask (724), typically after the light beam is phase modulated, and focusing the light beam onto a target wafer (726).

Abstract: An optical lithography system (10) for exposing a layer (12) of radiation sensitive material on a semiconductor wafer (16) is provided. System (10) comprises a source of polarized radiant energy (18), a mask (20) and a lens (22). Radiant energy from a light source (28) is polarized in a predetermined orientation by polarization filter (30). Polarized radiant energy passes through mask (20) and exposes layer (12) in a predetermined pattern. Actuating member (32) may rotate polarization filter (30) to provide more than one orientation for the polarized radiant energy during a single exposure.

Abstract: A photolithographic mask or a directly written wafer has a pattern formed on a substrate 320. A grid pattern 316 and a layer of resist material 322 are formed on the substrate 320. The grid pattern 316 may be either above or beneath the resist material 320. The grid pattern 316 is scanned, by an e-beam or optical beam for example, without substantially reacting the resist layer 320 to obtain information on the location of the grid pattern 316. Portions of the resist material 320 are then exposed to form a device pattern. The device pattern is determined in part from the information and is also formed over the grid pattern 316. Other systems and methods are also disclosed.

Abstract: A system (10) is provided for etching a surface (14). A vacuum enclosure (12) is provided to create a vacuum around containers (13) and the surface to be etched (14). A pressurized gas source (16) is utilized to input gas into the containers (13). A wire coil (38) is wrapped around the containers (13) and provided with an oscillator (40) to generate radio frequency energy. The radio frequency energy excites the gas within the containers (13) which is then discharged through an output opening (46) toward the surface to be etched (14). A vacuum pump (20) is provided to evacuate the enclosure (12).