Patents by Inventor Shang-Wern Chang
Shang-Wern Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230359124Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.Type: ApplicationFiled: July 14, 2023Publication date: November 9, 2023Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
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Patent number: 11703766Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.Type: GrantFiled: July 25, 2022Date of Patent: July 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
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Publication number: 20220373891Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.Type: ApplicationFiled: July 25, 2022Publication date: November 24, 2022Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
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Patent number: 11442364Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.Type: GrantFiled: May 16, 2019Date of Patent: September 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
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Publication number: 20220260918Abstract: In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.Type: ApplicationFiled: May 2, 2022Publication date: August 18, 2022Inventors: Chien-Wei WANG, Ching-Yu CHANG, Shang-Wern CHANG, Yen-Hao CHEN
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Patent number: 11320738Abstract: In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.Type: GrantFiled: March 27, 2019Date of Patent: May 3, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Wei Wang, Ching-Yu Chang, Shang-Wern Chang, Yen-Hao Chen
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Publication number: 20210311388Abstract: Manufacturing semiconductor device includes forming photoresist layer. Photoresist layer is selectively exposed to actinic radiation and developed to form pattern. Photoresist composition includes: iodine-containing sensitizer, photoactive compound, polymer.Type: ApplicationFiled: February 5, 2021Publication date: October 7, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Wei-Han LAI, Li-Po YANG, Shang-Wern CHANG, Ching-Yu CHANG, Tzu-Yang LIN, Chin-Hsiang LIN
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Publication number: 20200006048Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.Type: ApplicationFiled: May 16, 2019Publication date: January 2, 2020Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
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Publication number: 20200004151Abstract: In a pattern formation method, a bottom layer is formed over an underlying layer. A middle layer is formed over the bottom layer. A resist pattern is formed over the middle layer. The middle layer is patterned by using the resist pattern as an etching mask. The bottom layer is patterned by using the patterned middle layer. The underlying layer is patterned. The middle layer contains silicon in an amount of 50 wt % or more and an organic material. In one or more of the foregoing and following embodiments, an annealing operation is further performed after the middle layer is formed.Type: ApplicationFiled: March 27, 2019Publication date: January 2, 2020Inventors: Chien-Wei WANG, Ching-Yu CHANG, Shang-Wern CHANG, Yen-Hao CHEN
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Patent number: 9814097Abstract: A baking apparatus for priming a substrate is provided, which includes a chamber, a hot plate and a barrier element. The hot plate is in the chamber and configured to bake the substrate on the hot plate. The barrier element is in contact with a periphery of the substrate and the hot plate to prevent contamination on a lower surface of the substrate. Another baking apparatus for priming a substrate is also provided, which includes a chamber and a hot plate. The hot plate is in the chamber and in full contact with a lower surface of the substrate to prevent contamination thereon.Type: GrantFiled: April 14, 2014Date of Patent: November 7, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Hung Wang, Ren-Jyh Leu, Shang-Wern Chang, Heng-Hsin Liu
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Patent number: 9563946Abstract: The present disclosure provides an overlay metrology method, an overlay control method and an overlay control system. The overlay metrology method includes capturing a current layer image of a current overlay mark on a current layer with a current focal length and capturing a previous layer image of a previous overlay mark on a previous layer with a previous focal length. Then, the overlay metrology method further includes combining the current layer image with the previous layer image to form an overlay mark image and determining an overlay error between the current overlay mark and the previous overlay mark based on the overlay mark image.Type: GrantFiled: July 22, 2014Date of Patent: February 7, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yung-Yao Lee, Ying-Ying Wang, Shang-Wern Chang, Heng-Hsin Liu
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Patent number: 9281205Abstract: A method for etching an ultra thin film is provided which includes providing a substrate having the ultra thin film formed thereon, patterning a photosensitive layer formed over the ultra thin film, etching the ultra thin film using the patterned photosensitive layer, and removing the patterned photosensitive layer. The etching process includes utilizing an etch material with a diffusion resistant carrier such that the etch material is prevented from diffusing to a region underneath the photosensitive layer and removing portions of the ultra thin film underneath the photosensitive layer.Type: GrantFiled: January 6, 2014Date of Patent: March 8, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Chu Liu, Kuei-Shun Chen, Shang-Wern Chang, Chih-Yang Yeh
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Publication number: 20160025650Abstract: The present disclosure provides an overlay metrology method, an overlay control method and an overlay control system. The overlay metrology method includes capturing a current layer image of a current overlay mark on a current layer with a current focal length and capturing a previous layer image of a previous overlay mark on a previous layer with a previous focal length. Then, the overlay metrology method further includes combining the current layer image with the previous layer image to form an overlay mark image and determining an overlay error between the current overlay mark and the previous overlay mark based on the overlay mark image.Type: ApplicationFiled: July 22, 2014Publication date: January 28, 2016Inventors: Yung-Yao LEE, Ying-Ying WANG, Shang-Wern CHANG, Heng-Hsin LIU
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Publication number: 20150296563Abstract: A baking apparatus for priming a substrate is provided, which includes a chamber, a hot plate and a barrier element. The hot plate is in the chamber and configured to bake the substrate on the hot plate. The barrier element is in contact with a periphery of the substrate and the hot plate to prevent contamination on a lower surface of the substrate. Another baking apparatus for priming a substrate is also provided, which includes a chamber and a hot plate. The hot plate is in the chamber and in full contact with a lower surface of the substrate to prevent contamination thereon.Type: ApplicationFiled: April 14, 2014Publication date: October 15, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Hung WANG, Ren-Jyh LEU, Shang-Wern CHANG, Heng-Hsin LIU
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Publication number: 20140106566Abstract: A method for etching an ultra thin film is provided which includes providing a substrate having the ultra thin film formed thereon, patterning a photosensitive layer formed over the ultra thin film, etching the ultra thin film using the patterned photosensitive layer, and removing the patterned photosensitive layer. The etching process includes utilizing an etch material with a diffusion resistant carrier such that the etch material is prevented from diffusing to a region underneath the photosensitive layer and removing portions of the ultra thin film underneath the photosensitive layer.Type: ApplicationFiled: January 6, 2014Publication date: April 17, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Chu LIU, Kuei-Shun Chen, Shang-Wern Chang, Chih-Yang Yeh
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Patent number: 6441115Abstract: The present invention provides a photosensitive polymer containing the following structure unit of formula (II): Wherein R is hydrogen or C1-C4 alkyl group; R′ is C1-C4 alkyl group; n is an integer of 2, 3, 4, 5 or 6. This photosensitive polymer also relates to chemical amplified photoresist composition. This chemical amplified photoresist composition can be applied to general lithography processes, especially in 193 nm lithography and the patterns formed from the photoresist composition exhibit excellent resolution and photosensitivity.Type: GrantFiled: June 30, 2000Date of Patent: August 27, 2002Assignee: Everlight USA, Inc.Inventors: Shang-Wern Chang, Yen-Cheng Li, Shang-Ho Lin
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Patent number: 6376700Abstract: An alicyclic compound of the formula (1) is disclosed: wherein R1 and R2 each independently is a hydroxyl group, a C1-8 hydroxyalkyl group, or a C3-8 hydroxycycloalkyl group; R3, R4 and R5 each independently is a hydrogen, a C1-8 hydroxyalkyl group, a C1-6 carboxylic acid or a C3-8 carboxylic acid ester; k is an integer of 0, 1, 2, 3, 4, 5 or 6. The compound of the formula (1) can be applied to dissolution inhibitors for preparing positive photoresist composition.Type: GrantFiled: June 30, 2000Date of Patent: April 23, 2002Assignee: Everlight USA, Inc.Inventors: Shang-Wern Chang, Yen-Cheng Li, Shang-Ho Lin, Wen-Chieh Wang
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Patent number: 6316159Abstract: A chemical amplified photoresist composition comprising a photosensitive polymer containing the following structure unit of formula (II): Wherein R is hydrogen or C1-C4 alkyl group; R′ is C1-C4 alkyl group; n is an integer of 2, 3, 4, 5 or 6. This chemical amplified photoresist composition can be applied to general lithography processes, especially in 193 nm lithography and the patterns formed from the photoresist exhibit excellent resolution and photosensitivity.Type: GrantFiled: June 30, 2000Date of Patent: November 13, 2001Assignee: Everlight USA, Inc.Inventors: Shang-Wern Chang, Yen-Cheng Li, Shang-Ho Lin
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Patent number: 6294309Abstract: A positive photoresist composition comprising a polymer, a photoactived agent and an dissolution inhibitor represented by the following formula (1): wherein R1, R2, R3, R4, R5 and k are defined in the specification. The photoresist composition of the present invention is useful as a chemically amplified type resist when exposed to deep UV light from a KrF and ArF excimer laser.Type: GrantFiled: June 30, 2000Date of Patent: September 25, 2001Assignee: Everlight USA, Inc.Inventors: Shang-Wern Chang, Yen-Cheng Li, Shang-Ho Lin, Wen-Chieh Wang
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Patent number: 6271412Abstract: This invention provides a compound of the formula (I): wherein R is hydrogen or C1-C4 alkyl group; R′ is C1-C4 alkyl group; n is an integer of 2, 3, 4, 5 or 6. The compound of formula (I) can be polymerized or copolymerized to form a photosensitive polymer or copolymer.Type: GrantFiled: June 30, 2000Date of Patent: August 7, 2001Assignee: Everlight USA, Inc.Inventors: Shang-Wern Chang, Yen-Cheng Li, Shang-Ho Lin