Patents by Inventor Shang-Yi Chen

Shang-Yi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170179723
    Abstract: A clustered energy-storing micro-grid system includes a renewable energy device, a clustered energy-storing device, an electrical power conversion device and a local controller. Before coordinating and allocating power to a plurality of loads, the clustered energy-storing device stores and releases the power in a centralized manner. This, coupled with the control exercised by the local controller over the electrical power conversion device, controls the micro-grid system in its entirety so that the micro-grid system operates in cost-efficient optimal conditions, under a predetermined system operation strategy, and in a system operation mode.
    Type: Application
    Filed: December 16, 2015
    Publication date: June 22, 2017
    Inventors: CHIEN-HAO CHEN, KUO-KUANG JEN, YU-JEN LIU, GARY W. CHANG, SHANG-YI CHEN
  • Publication number: 20170169140
    Abstract: A simulation test system of a cluster-based microgrid integrated with energy storages is characterized in that an operation simulation test of a physical microgrid system is conducted with a computer as well as a power generation data and a power consumption data which are imported. Hence, the user can verify the feasibility of applying various design concepts and ideas, such as controller parameter design and system energy management strategies, to a physical microgrid system, without installing or using any physical apparatuses.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 15, 2017
    Inventors: CHIEN-HAO CHEN, YING-SUN HUANG, YU-JEN LIU, GARY W. CHANG, SHANG-YI CHEN
  • Publication number: 20140325465
    Abstract: A chip with flexible pad sequence manipulation is provided. The chip can be a memory controller, and includes a hub unit. The hub unit, formed by a gate array, is placed in a hub region predetermined during placing and routing procedures, and is capable of supporting re-placing and re-routing for changing interior interconnections and a pad sequence of the chip.
    Type: Application
    Filed: April 24, 2014
    Publication date: October 30, 2014
    Applicant: MStar Semiconductor, Inc.
    Inventors: Hsin-Cheng Lai, Yung Chang, Chen-Nan Lin, Chung-Ching Chen, Chen-Hsing Lo, Shang-Yi Chen, Cheng-Hsun Liu
  • Patent number: 7079998
    Abstract: A method for analyzing power noise and method for reducing the same are disclosed, wherein the present invention is utilized in an IC design process. First, a DC analysis is performed with a related IC design by utilizing computer aided design (CAD) software and circuit simulation software for obtaining a power network model of the IC design. Then, the power network model is defined as being composed of a plurality of unit blocks. After analysis, the quantity and type, etc., of components connected electrically to each of the unit blocks are recognized and are regarded as component reference data of each of the unit blocks. Afterwards, according to the component reference data of each of the unit blocks, the voltage drop (IR drop) occurring in operation for each of the unit blocks is evaluated and obtained by utilizing an equivalent circuit constructed by components that are connected electrically to each of the unit blocks.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: July 18, 2006
    Assignee: Silicon Integrated Systems Corporation
    Inventors: Hao-Luen Tien, Shang-Yi Chen, Ming-Huan Lu, Chun-An Tu
  • Publication number: 20040030511
    Abstract: A method for analyzing power noise and method for reducing the same are disclosed, wherein the present invention is utilized in an IC design process. First, a DC analysis is performed with a related IC design by utilizing computer aided design (CAD) software and circuit simulation software for obtaining a power network model of the IC design. Then, the power network model is defined as being composed of a plurality of unit blocks. After analysis, the quantity and type, etc., of components connected electrically to each of the unit blocks are recognized and are regarded as component reference data of each of the unit blocks. Afterwards, according to the component reference data of each of the unit blocks, the voltage drop (IR drop) occurring in operation for each of the unit blocks is evaluated and obtained by utilizing an equivalent circuit constructed by components that are connected electrically to each of the unit blocks.
    Type: Application
    Filed: November 19, 2002
    Publication date: February 12, 2004
    Inventors: Hao-Luen Tien, Shang-Yi Chen, Ming-Huan Lu, Chun-An Tu