Patents by Inventor Shankar Swaminathan

Shankar Swaminathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170323786
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Application
    Filed: July 19, 2017
    Publication date: November 9, 2017
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Publication number: 20170316988
    Abstract: Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.
    Type: Application
    Filed: July 14, 2017
    Publication date: November 2, 2017
    Inventors: Hu Kang, Shankar Swaminathan, Adrien LaVoie, Jon Henri
  • Patent number: 9793096
    Abstract: A substrate processing system for depositing film on a substrate includes a processing chamber defining a reaction volume. A showerhead includes a stem portion having one end connected adjacent to an upper surface of the processing chamber. A base portion is connected to an opposite end of the stem portion and extends radially outwardly from the stem portion. The showerhead is configured to introduce at least one of process gas and purge gas into the reaction volume. A plasma generator is configured to selectively generate RF plasma in the reaction volume. An edge tuning system includes a collar and a parasitic plasma reducing element that is located around the stem portion between the collar and an upper surface of the showerhead. The parasitic plasma reducing element is configured to reduce parasitic plasma between the showerhead and the upper surface of the processing chamber.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: October 17, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Hu Kang, Adrien LaVoie, Shankar Swaminathan, Jun Qian, Chloe Baldasseroni, Frank Pasquale, Andrew Duvall, Ted Minshall, Jennifer Petraglia, Karl Leeser, David Smith, Sesha Varadarajan, Edward Augustyniak, Douglas Keil
  • Patent number: 9793110
    Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: October 17, 2017
    Assignee: Lam Research Corporation
    Inventors: Hu Kang, Shankar Swaminathan, Jun Qian, Wanki Kim, Dennis Hausmann, Bart J. van Schravendijk, Adrien LaVoie
  • Patent number: 9786570
    Abstract: Methods and apparatus to form films on sensitive substrates while preventing damage to the sensitive substrate are provided herein. In certain embodiments, methods involve forming a bilayer film on a sensitive substrate that both protects the underlying substrate from damage and possesses desired electrical properties. Also provided are methods and apparatus for evaluating and optimizing the films, including methods to evaluate the amount of substrate damage resulting from a particular deposition process and methods to determine the minimum thickness of a protective layer. The methods and apparatus described herein may be used to deposit films on a variety of sensitive materials such as silicon, cobalt, germanium-antimony-tellerium, silicon-germanium, silicon nitride, silicon carbide, tungsten, titanium, tantalum, chromium, nickel, palladium, ruthenium, or silicon oxide.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: October 10, 2017
    Assignee: Novellus Systems, Inc.
    Inventors: Hu Kang, Shankar Swaminathan, Adrien LaVoie, Jon Henri
  • Publication number: 20170275756
    Abstract: Pedestal assemblies and methods for using said pedestal assemblies, used in processing chambers implemented for processing substrates are disclosed. In one example, the pedestal assembly includes a center column coupled to a lower chamber body of a processing chamber. A pedestal body is coupled to the center column. The pedestal body includes a substrate support surface and an annular step formed around a circumference of the pedestal body and surrounding the substrate support surface. Further included is a first annular ring segment disposed within the annular step. The first annular ring is defined from a conductive material. A second annular ring segment is also disposed within the annular step. The second annular ring is defined from a dielectric material. The first annular ring and the second annular ring fill the annular step around the circumference of the pedestal body.
    Type: Application
    Filed: March 22, 2016
    Publication date: September 28, 2017
    Inventors: Ryan Blaquiere, Ramesh Chandrasekharan, Shankar Swaminathan, Yukinori Sakiyama
  • Publication number: 20170263450
    Abstract: The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.
    Type: Application
    Filed: May 31, 2017
    Publication date: September 14, 2017
    Inventors: Shankar Swaminathan, Frank L. Pasquale, Adrien LaVoie
  • Patent number: 9698042
    Abstract: A method for reducing slippage of a wafer during film deposition includes pumping out a processing chamber while the wafer is supported on lift pins or a carrier ring and lowering the wafer onto support members configured to minimize wafer slippage during deposition of the film. A multi-station processing chamber, such as a processing chamber for atomic layer deposition, can include a chuck-less pedestal at each station having wafer supports configured to prevent the wafer from moving off center by more than 400 microns. To minimize a gas cushion beneath the wafer, the wafer supports can provide a gap of at least 2 mils between the back side of the wafer and the wafer-facing surface of the pedestal.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: July 4, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Chloe Baldasseroni, Ted Minshall, Frank L. Pasquale, Shankar Swaminathan, Ramesh Chandrasekharan
  • Publication number: 20170175269
    Abstract: A gas delivery system includes a first valve including an inlet that communicates with a first gas source. A first inlet of a second valve communicates with an outlet of the first valve and a second inlet of the second valve communicates with a second gas source. An inlet of a third valve communicates with a third gas source. A connector includes a first gas channel and a cylinder defining a second gas channel. The cylinder and the first gas channel collectively define a flow channel between an outer surface of the cylinder and an inner surface of the first gas channel. The flow channel communicates with the outlet of the third valve and the first end of the second gas channel. A third gas channel communicates with the second gas channel, with the outlet of the second valve and with a gas distribution device of a processing chamber.
    Type: Application
    Filed: March 8, 2017
    Publication date: June 22, 2017
    Inventors: Ramesh Chandrasekharan, Jennifer O'Loughlin, Saangrut Sangplung, Shankar Swaminathan, Frank Pasquale, Chloe Baldasseroni, Adrien LaVoie
  • Publication number: 20170167017
    Abstract: Disclosed are methods of depositing films of material on semiconductor substrates employing the use of a secondary purge. The methods may include flowing a film precursor into a processing chamber and adsorbing the film precursor onto a substrate in the processing chamber such that the precursor forms an adsorption-limited layer on the substrate. The methods may further include removing at least some unadsorbed film precursor from the volume surrounding the adsorbed precursor by purging the processing chamber with a primary purge gas, and thereafter reacting adsorbed film precursor while a secondary purge gas is flowed into the processing chamber, resulting in the formation of a film layer on the substrate. The secondary purge gas may include a chemical species having an ionization energy and/or a disassociation energy equal to or greater than that of O2. Also disclosed are apparatuses which implement the foregoing processes.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventors: Adrien LaVoie, Hu Kang, Purushottam Kumar, Shankar Swaminathan, Jun Qian, Frank L. Pasquale, Chloe Baldasseroni
  • Patent number: 9673041
    Abstract: The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: June 6, 2017
    Assignee: Lam Research Corporation
    Inventors: Shankar Swaminathan, Frank L. Pasquale, Adrien LaVoie
  • Publication number: 20170148628
    Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.
    Type: Application
    Filed: February 7, 2017
    Publication date: May 25, 2017
    Inventors: Shankar Swaminathan, Jon Henri, Dennis Hausmann, Pramod Subramonium, Mandyam Sriram, Vishwanathan Rangarajan, Kirthi Kattige, Bart van Schravendijk, Andrew J. McKerrow
  • Publication number: 20170121819
    Abstract: Heights of carrier ring supports are increased at a side of a wafer that is located closer to a spindle of a plasma chamber. The heights are increased relative to a height of a carrier ring support that is located closer to side walls of the plasma chamber. The increase in the height results in an increase in thickness of a thin film deposited on the wafer to further achieve uniformity in thickness of the thin film across a top surface of the wafer.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 4, 2017
    Inventors: Shankar Swaminathan, Pramod Subramonium, Frank L. Pasquale, Jeongseok Ha, Chloe Baldasseroni
  • Patent number: 9631276
    Abstract: A gas delivery system includes a first valve including an inlet that communicates with a first gas source. A first inlet of a second valve communicates with an outlet of the first valve and a second inlet of the second valve communicates with a second gas source. An inlet of a third valve communicates with a third gas source. A connector includes a first gas channel and a cylinder defining a second gas channel. The cylinder and the first gas channel collectively define a flow channel between an outer surface of the cylinder and an inner surface of the first gas channel. The flow channel communicates with the outlet of the third valve and the first end of the second gas channel. A third gas channel communicates with the second gas channel, with the outlet of the second valve and with a gas distribution device of a processing chamber.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: April 25, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ramesh Chandrasekharan, Jennifer O'Loughlin, Saangrut Sangplung, Shankar Swaminathan, Frank Pasquale, Chloe Baldasseroni, Adrien LaVoie
  • Patent number: 9624578
    Abstract: Methods for depositing film on substrates are provided. In these embodiments, the substrates are processed in batches. Due to changing conditions within a reaction chamber as additional substrates in the batch are processed, various film properties may trend over the course of a batch. The methods herein can be used to address the trending of film properties over the course of a batch. More specifically, film property trending is minimized by changing the amount of RF power used to process substrates over the course of the batch. Such methods are sometimes referred to as RF compensation methods.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: April 18, 2017
    Assignee: Lam Research Corporation
    Inventors: Jun Qian, Frank L. Pasquale, Adrien LaVoie, Chloe Baldasseroni, Hu Kang, Shankar Swaminathan, Purushottam Kumar, Paul Franzen, Trung T. Le, Tuan Nguyen, Jennifer Petraglia, David Charles Smith, Seshasayee Varadarajan
  • Patent number: 9617638
    Abstract: Disclosed are methods of depositing films of material on semiconductor substrates employing the use of a secondary purge. The methods may include flowing a film precursor into a processing chamber and adsorbing the film precursor onto a substrate in the processing chamber such that the precursor forms an adsorption-limited layer on the substrate. The methods may further include removing at least some unadsorbed film precursor from the volume surrounding the adsorbed precursor by purging the processing chamber with a primary purge gas, and thereafter reacting adsorbed film precursor while a secondary purge gas is flowed into the processing chamber, resulting in the formation of a film layer on the substrate. The secondary purge gas may include a chemical species having an ionization energy and/or a disassociation energy equal to or greater than that of O2. Also disclosed are apparatuses which implement the foregoing processes.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: April 11, 2017
    Assignee: Lam Research Corporation
    Inventors: Adrien LaVoie, Hu Kang, Purushottam Kumar, Shankar Swaminathan, Jun Qian, Frank Pasquale, Chloe Baldasseroni
  • Publication number: 20170098556
    Abstract: A substrate processing system includes a processing chamber including a top surface, a bottom surface and side walls. A substrate support is arranged in the processing chamber to support a substrate during processing. A purge structure is arranged in the processing chamber below a plane occupied by the substrate during processing. The purge structure includes a first plurality of holes configured to supply purge gas to purge an area between the substrate support and the bottom surface of the processing chamber.
    Type: Application
    Filed: October 1, 2015
    Publication date: April 6, 2017
    Inventors: Ramesh Chandrasekharan, Shankar Swaminathan, Adrien Lavoie
  • Publication number: 20170053781
    Abstract: A multi-station chamber having a symmetric ground plate is disclosed. The multi-station chamber includes four stations, and the four stations are arranged in a square configuration with a rotating mechanism in a center location. A pedestal for supporting a substrate is provided for each of the four stations, each pedestal is disposed in a lower chamber body, and each pedestal includes a carrier ring. The lower chamber body includes outer walls and inner walls to define a space for each of the pedestals of the four chambers. A ground plate is disposed over the inner walls and attached to the outer walls. The ground plate has a center opening and a process opening for each station. The center opening is configured to receive the rotating mechanism at the center location. The process opening has a diameter that is larger than a diameter of the carrier ring at each station, and a symmetric gap is defined between an edge of each process opening defined by the ground plate and an outer edge of a carrier ring.
    Type: Application
    Filed: August 28, 2015
    Publication date: February 23, 2017
    Inventors: Adrien Lavoie, Shankar Swaminathan, Ramesh Chandrasekharan, Jennifer Petraglia, Shawn Hamilton
  • Patent number: 9570290
    Abstract: The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: February 14, 2017
    Assignee: Lam Research Corporation
    Inventors: Shankar Swaminathan, Frank L. Pasquale, Adrien LaVoie
  • Patent number: 9570274
    Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: February 14, 2017
    Assignee: Novellus Systems, Inc.
    Inventors: Shankar Swaminathan, Jon Henri, Dennis Hausmann, Pramod Subramonium, Mandyam Sriram, Vishwanathan Rangarajan, Kirthi Kattige, Bart van Schravendijk, Andrew J. McKerrow