Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

Abstract: A network interface device executes an input/output (I/O) virtualization manager to identify a virtual device defined to include resources of a particular virtual functions in a plurality of virtual functions associated with a physical function of a device. An operation is identified to be performed between the virtual device and a system image hosted by a host system coupled to the network interface device. The network interface device emulates the virtual device in the operation using the I/O virtualization manager.

Abstract: Creating hybrid virtual devices using a plurality of physical functions. A processor of a device may identify a plurality of physical functions accessible to the device, the plurality of physical functions including a first physical function and a second physical function. The processor may create a virtual device to comprise the first physical function to provide a first capability and the second physical function to provide a second capability, wherein the first capability and second capability are different capabilities.

Abstract: Examples described herein relate to circuitry configured to generate at least one virtual device interface to utilize the processor circuitry and provide the at least one virtual device interface to a server to assign to a process to provide the process with capability to utilize the processor circuitry. In some examples, the processor circuitry is to perform one or more of local area network access, cryptographic processing, and/or storage access. In some examples, the storage access comprises access to one or more Non-volatile Memory Express (NVMe) devices.

Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

Abstract: Examples described herein relate to a reliable transport protocol for packet transmission using an Address Family of an eXpress Data Path (AF_XDP) queue framework, wherein the AF_XDP queue framework is to provide a queue for received packet receipt acknowledgements (ACKs). In some examples, an AF_XDP socket is to connect a service with a driver for the network device, one or more queues are associated with the AF_XDP socket, and at least one of the one or more queues comprises a waiting queue for received packet receipt ACKs. In some examples, at least one of the one or more queues is to identify one or more packets for which ACKs have been received. In some examples, the network device is to re-transmit a packet identified by a descriptor in the waiting queue based on non-receipt of an ACK associated with the packet from a receiver.

Abstract: As described herein, for a selected process identifier and virtual address, a page fault arising from multiple sources can be solved by a one-time operation. The selected process identifier can include a virtual function (VF) identifier or process address space identifier (PASID). In some examples, solving a page fault arising from multiple sources by a one-time operation comprises invoking a page fault handler to determine an address translation.

Abstract: Examples described herein relate to a packet processing device that includes circuitry to receive an address translation for a virtual to physical address prior to receipt of a GPUDirect remote direct memory access (RDMA) operation, wherein the address translation is provided at initiation of a process executed by a host system and circuitry to apply the address translation for a received GPUDirect RDMA operation.

Abstract: Examples described herein relate to a reliable transport protocol for packet transmission using an Address Family of an eXpress Data Path (AF_XDP) queue framework, wherein the AF_XDP queue framework is to provide a queue for received packet receipt acknowledgements (ACKs). In some examples, an AF_XDP socket is to connect a service with a driver for the network device, one or more queues are associated with the AF_XDP socket, and at least one of the one or more queues comprises a waiting queue for received packet receipt ACKs. In some examples, at least one of the one or more queues is to identify one or more packets for which ACKs have been received. In some examples, the network device is to re-transmit a packet identified by a descriptor in the waiting queue based on non-receipt of an ACK associated with the packet from a receiver.

Abstract: Examples described herein relate to at least one processor and circuitry, when operational, to: in connection with a request from a device to copy data to a destination memory address: based on a page fault, copy the data to a backup page and after determination of a virtual-to-physical address translation, copy the data from the backup page to a destination page identified by the physical address. In some examples, the copy the data to a backup page is based on a page fault and an indication that a target buffer for the data is at or above a threshold level of fullness. In some examples, copying the data to a backup page includes: receive the physical address of the backup page from the device and copy data from the device to the backup page based on identification of the backup page.

Abstract: Examples described herein relate to a switch configured to allocate packet processing resources, from a pool of packet processing resources, to multiple applications, wherein the pool of packet processing resources comprise configurable packet processing pipelines of one or more network devices and packet processing resources of one or more servers. In some examples, the configurable packet processing pipelines and the packet processing resources are to perform one or more of: network switch operations, microservice communications, and/or block storage operations. In some examples, the network switch operations comprise one or more of: application of at least one access control list (ACL), packet forwarding, packet routing, and/or Virtual Extensible LAN (VXLAN) or GENEVE termination. In some examples, the microservice communications comprise one or more of: packet routing between microservices and/or load balancing of utilized microservices.

Abstract: Examples described herein relate to a switch comprising a programmable data plane pipeline, wherein the programmable data plane pipeline is configured to provide microservice-to-microservice communications within a service mesh. In some examples, to provide microservice-to-microservice communications within a service mesh, the programmable data plane pipeline is to perform a forwarding operation for a communication from a first microservice to a second microservice. In some examples, to perform a forwarding operation for a communication from a first microservice to a second microservice, the programmable data plane pipeline is to utilize a reliable transport protocol.

Abstract: Methods and apparatus for smart switch centered next generation cloud infrastructure architectures. Smart server switches are implemented in place of Top of Rack (ToR) switches and other switches in cloud infrastructure that include programmable switch chips (e.g., P4 switch chips) that are programmed via data plane runtime code executing on the switch chips to implement data plane operations in hardware in the switches. Meanwhile, control plane operations are implemented in the server switches via software executing on one or more CPUs or are implemented via servers that are coupled to the server switches. The data plane runtime code is used to forward data traffic and storage traffic in hardware via the programmable switch chips in a manner that offloads forwarding to hardware in virtualized cloud environments.

Abstract: Methods and apparatus for end-to-end data plane offloading for distributed storage using protocol hardware and Protocol Independent Switch Architecture (PISA) devices. Hardware-based data plane forwarding is implemented in compute and storage switches that comprise smart server switches running software executing in a kernel and user space. The compute switch is coupled to one or more compute servers/nodes and the storage server is coupled to one or more storage servers or storage arrays. The hardware-based data plane forwarding facilitates an end-to-end data plane between the computer server(s) and storage server(s)/array(s) that is offloaded to hardware. In one example the software comprises Ceph components used to implement control plane operations in connection with hardware offloaded data plane operations, and storage traffic employs the NVMe-oF protocol and the kernels include NVMe-oF modules. In one aspect the hardware-based data plane forwarding is implemented using programmable P4switch chips.

Abstract: Examples described herein relate to receiving memory access requests in a first number of connections from one or more front-end clients destined to a storage system and consolidating the memory access requests to a second number of connections between a network device and the storage system, wherein the second number is less than the first number. In some examples, consolidating the memory access requests includes combining read commands with other read commands destined to the storage system among connections of the first number of connections and combining write commands with other write commands destined to a same storage system among connections of the first number of connections. In some examples, consolidating the memory access requests includes performing protocol conversion to a format accepted by the storage system. In some examples, read or write commands are identified based on content of a header of a received packet, wherein the received packet includes a read or write command.

Abstract: Examples described herein relate to accessing an initiator as a Non-Volatile Memory Express (NMVe) device. In some examples, the initiator is configured with an address space, configured in kernel or user space, for access by a virtualized execution environment. In some examples, the initiator to copy one or more storage access commands from the virtualized execution environment into a queue for access by a remote direct memory access (RDMA) compatible network interface. In some examples, the network interface to provide Non-Volatile Memory Express over Fabrics (NVMe-oF) compatible commands based on the one or more storage access commands to a target storage device. In some examples, the initiator is created as a mediated device in kernel space or user space of a host system. In some examples, configuration of a physical storage pool address of the target storage device for access by the virtualized execution environment occurs by receipt of the physical storage pool address in a configuration command.

Abstract: Methods and apparatus for evolving hypervisor pass-through devices supporting platform independence through a core solution called MUSE (Mdev in User SpacE) that allows mediated pass-through device being served by software running in user space. The MUSE architecture supports platform hardware independence while providing pass-through performance similar to hardware-specific solutions and providing enhanced performance in virtualized environments using existing software components, including various operating systems and associated libraries for implementing SDN (Software Defined Networking) and VNF (Virtualized Network Function).

Abstract: The present invention discloses a method for implementing a SIM card function on a terminal, a terminal and a UICC. The method includes: downloading information for implementing the SIM card function; writing the information for implementing the SIM card function into a reserved storage space of the terminal; and after the SIM card is activated, authenticating an access identity of a terminal user by using the information for implementing the SIM card function. In the present invention, the information for implementing the SIM card function is downloaded to the terminal, so as to implement the SIM card function by means of software.

Abstract: The present invention discloses a method for implementing a SIM card function on a terminal, a terminal and a UICC. The method includes: downloading information for implementing the SIM card function; writing the information for implementing the SIM card function into a reserved storage space of the terminal; and after the SIM card is activated, authenticating an access identity of a terminal user by using the information for implementing the SIM card function. In the present invention, the information for implementing the SIM card function is downloaded to the terminal, so as to implement the SIM card function by means of software.