Abstract: A storage domain management system supports storage domains. The storage server includes a plurality of communication interfaces. A first set of communication interfaces in the plurality is adapted for connection to all kinds of users of data. A second set of communication interfaces in the plurality is adapted for connection to respective devices in a pool of storage devices for use in a storage domain. Data processing resources in the server are coupled to the plurality of communication interfaces for transferring data among the interfaces. The data processing resources comprise a plurality of driver modules and configurable logic linking driver modules into data paths. Each configured data path acts as a virtual circuit that includes a set of driver modules selected from the plurality of driver modules. A data storage transaction which is received at a communication interface is mapped to one of the configured data paths.

Abstract: A memory system with non-volatile integrated circuit memory devices including an interface for a high speed bus is described, supporting continuous writes at the bus speed, without the possibility of buffer overrun during most conditions. The system comprises an memory bus, an system buffer, an array of non-volatile storage units, such as flash memory devices, and an interconnect system supporting data transfer among the components. The array includes sets and subsets of non-volatile storage units, referred to herein for convenience as platters having multiple banks, banks having multiple columns, and columns having multiple storage units. The storage units comprises integrated circuit memory having page buffers, with input ports. In one example, the array includes two platters, eight banks per platter, four columns per bank, and eight storage units per column, for a total of 256 storage units. The system buffer includes at least the same number of stores as columns in each bank.

Abstract: A memory system with non-volatile integrated circuit memory devices including an interface for a high speed bus is described, supporting continuous writes at the bus speed, without the possibility of buffer overrun during most conditions. The system comprises an memory bus, an system buffer, an array of non-volatile storage units, such as flash memory devices, and an interconnect system supporting data transfer among the components. The array includes sets and subsets of non-volatile storage units, referred to herein for convenience as platters having multiple banks, banks having multiple columns, and columns having multiple storage units. The storage units comprises integrated circuit memory having page buffers, with input ports. In one example, the array includes two platters, eight banks per platter, four columns per bank, and eight storage units per column, for a total of 256 storage units. The system buffer includes at least the same number of stores as columns in each bank.

Abstract: A storage server comprising: a processing unit, a bus system coupled with the processing unit, including a plurality of slots, slots in the plurality of slots including interfaces to respective data stores; a communication interface; and an operating system coupled with the processing unit the operating system including: logic controlling transfers among the plurality of slots over the bus system according to an internal format, logic for translating a storage transaction received over the communication interface into the internal format, and logic for configuring the plurality of slots according to a configuration data.

Abstract: A card management system architecture for managed startup of a system and for monitoring its operation is provided. Both a method and device particularly suited to carrying out the method are provided. According to one embodiment of the method, a second controller evaluates the status of power supplies and then powers up a first controller and processors on input-output processors (IOPs). The first controller evaluates the status of individual IOPs and enables additional power and data interfaces. Additional embodiments involve additional structures and steps. Redundant channels for communications among controllers and IOPs are preferred. In one embodiment, the first bus is implemented as five serial communication lines. Communication between redundant first controllers and between redundant second controllers allows determination of which controllers should be active.

Abstract: An apparatus is described, comprising a plurality of banks, each bank having a number of columns of non-volatile storage units, each non-volatile storage unit having an input buffer for storing a page of data, the page having an input coupled to the input buffer accepting an input portion of data of a page at a memory speed, the non-volatile storage units storing the data from the input buffer within a memory write time; a plurality of interface buffers; an input bus having an input bus speed which is faster than the memory speed, the input bus being coupled to the plurality of interface buffers; a bus system, connecting each of the plurality of interface buffers to the non-volatile storage units of a column in each of the plurality of banks, supplying data from the plurality of interface buffers to the inputs of the non-volatile storage units at the memory speed.

Abstract: An assembly that engages a component to a computer system includes a cover adapted to retain the component and to be inserted within a chassis of the computer system. A slide movably coupled to the cover has a proximal position associated with inserting the cover into the chassis and a distal position associated with withdrawing the cover from the chassis. A detector coupled to a lock and to the slide detects movement of the slide to actuate the lock. The lock is coupled to the slide and to the detector, and blocks movement of the slide towards the distal point when the lock is in an engaged state.

Abstract: An adapter arrangement for internetworking a non-CTOS computer means with a network of CTOS terminals, including a system-bus, this arrangement being adapted for introduction into, and cooperation with, the non-CTOS computer and comprising CTOS-net bus means for transferring signals from the system-bus plus a communication control stage for controlling and transferring signals to/from the CTOS network and a net-interface stage.

Abstract: Disclosed is a portable adapter unit for coupling a small portable computer to a computer network which comprises a network coupling/signal processing circuit, an input connector for one-step connection to such a computer and an output connector for connection to the network, this adapter unit being sufficiently small and light-weight to be transported and used, off-site, with such a portable computer.

Abstract: An adapter arrangement for internetworking a non-CTOS computer means with a network of CTOS terminals, including a system-bus, this arrangement being adapted for introduction into, and cooperation with, the non-CTOS computer and comprising CTOS-net bus means for transferring signals from the system-bus plus a communication control stage for controlling and transferring signals to/from the CTOS network and a net-interface stage.

Abstract: An adapter arrangement for internetworking a non-CTOS computer with a network of CTOS terminals, including a system-bus, this arrangement being adapted for introduction into, and cooperation with, the non-CTOS computer and comprising CTOS-net bus for transferring signals from the system-bus plus a communication control stage for controlling and transferring signals to/from the CTOS network and a net-interface stage.