Abstract: A fuse-programmable circuit controllably enables or disables an electrical signal (S). The circuit includes a transmission gate (118) connected between the circuit's input and output terminals. The transmission gate is controlled by complimentary outputs OUTH, OUTL of a fuse-programmable latch (130). A PMOS transistor (Q41) and a fuse (F41) are connected in series between the output terminal and a power supply voltage (VCC). An NMOS transistor (Q42) and a fuse (F42) are connected in series between the output terminal and a reference voltage (ground). The gate of the PMOS transistor is connected to the latch output OUTH. The gate of the NMOS transistor is connected to the latch output OUTL. When OUTH is high and OUTL is low, the transmission gate couples the signal (S) from the input terminal to the output terminal. When OUTH is low and OUTL is high, the transmission gate is closed.

Abstract: A circuit provides a differential voltage on two nodes. The nodes are precharged by a precharge circuit before every cycle in which the differential voltage is provided. If during the precharge operation, the node voltage at one of the two nodes is within a predetermined range of voltages relative to a supply voltage used in the precharge operation, then the precharge circuit is incapable of precharging the two nodes to the same voltage, Therefore, an equalization transistor is provides between the two nodes to ensure that the two nodes are properly precharged and equalized by the end of the precharge operation.