Abstract: An electrical device (100) that comprises at least one signal filter (104) comprising a plurality of mechanical resonators (106 108, 110) in a substrate (102) and at least one further mechanical resonator (112) in the substrate (102) configured to oscillate at a reference frequency of an oscillator signal. An electrical system (300) comprising an electrical oscillator (306) a transceiver (302) and an antenna (310), and an electrical device (100). A method (1300) for providing an electrical device (100).

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

Abstract: Methods, systems, and circuitries are provided to generate clock signals of different qualities in a device. A method includes determining whether the device is operating in a mid power mode or a high power mode. In response to determining that the device is operating in the mid power mode, oscillator circuitry is controlled to cause the oscillator circuitry to consume a lower amount of power, such that the oscillator circuitry generates a lower quality clock signal. In response to determining that the device is operating in the high power mode, the oscillator circuitry is controlled to cause the oscillator circuitry to consume a higher amount of power, such that the oscillator circuitry generates a higher quality clock signal. The lower amount of power and the higher amount of power are different from one another.

Abstract: A crystal oscillator is provided. The crystal oscillator includes a crystal resonator including a pair of terminals and being capable of oscillating at a fundamental resonance frequency and at least one overtone resonance frequency. Further, the crystal oscillator includes an inverter circuit coupled between the pair of terminals. The crystal oscillator additionally includes a suppression circuit configured to suppress oscillation of the crystal resonator at the fundamental resonance frequency. Further, the crystal oscillator includes a control circuit configured to control a switch circuit for selectively coupling the suppression circuit to the crystal resonator.

Abstract: Methods, systems, and circuitries are provided to generate clock signals of different qualities in a device. A method includes determining whether the device is operating in a mid power mode or a high power mode. In response to determining that the device is operating in the mid power mode, oscillator circuitry is controlled to cause the oscillator circuitry to consume a lower amount of power, such that the oscillator circuitry generates a lower quality clock signal. In response to determining that the device is operating in the high power mode, the oscillator circuitry is controlled to cause the oscillator circuitry to consume a higher amount of power, such that the oscillator circuitry generates a higher quality clock signal. The lower amount of power and the higher amount of power are different from one another.

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

Abstract: An electrical device (100) that comprises at least one signal filter (104) comprising a plurality of mechanical resonators (106 108, 110) in a substrate (102) and at least one further mechanical resonator (112) in the substrate (102) configured to oscillate at a reference frequency of an oscillator signal. An electrical system (300) comprising an electrical oscillator (306) a transceiver (302) and an antenna (310), and an electrical device (100). A method (1300) for providing an electrical device (100).

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

Abstract: Described is an apparatus of a thermal sensor and/or bandgap reference circuit which is independent of an operational amplifier. The apparatus comprises: a forward biased diode circuit having one or more diodes; a first switch-capacitor sampler coupled to the forward biased diode circuit, the first switch-capacitor sampler to provide a reference voltage which is proportional to absolute temperature; and a second switch-capacitor sampler coupled to the forward biased diode circuit.

Abstract: A crystal oscillator is provided. The crystal oscillator includes a crystal resonator including a pair of terminals and being capable of oscillating at a fundamental resonance frequency and at least one overtone resonance frequency. Further, the crystal oscillator includes an inverter circuit coupled between the pair of terminals. The crystal oscillator additionally includes a suppression circuit configured to suppress oscillation of the crystal resonator at the fundamental resonance frequency. Further, the crystal oscillator includes a control circuit configured to control a switch circuit for selectively coupling the suppression circuit to the crystal resonator.

Abstract: Described is an apparatus of a thermal sensor and/or bandgap reference circuit which is independent of an operational amplifier. The apparatus comprises: a forward biased diode circuit having one or more diodes; a first switch-capacitor sampler coupled to the forward biased diode circuit, the first switch-capacitor sampler to provide a reference voltage which is proportional to absolute temperature; and a second switch-capacitor sampler coupled to the forward biased diode circuit.

Abstract: Briefly, in accordance with one embodiment of the invention, a transmitter and a method for generating an output signal according to a first and second outphased signals are provided. The method and transmitter generates the first and the second outphased signals according to amplitude and a phase of an input signal.