Patents by Inventor Shawn A. Adderly

Shawn A. Adderly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10607899
    Abstract: An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a movable stage configured to hold a substrate; an inspection and analysis probe; a heat source; a gas injector; and a gas manifold connecting multiple gas sources to the gas injector.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: March 31, 2020
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Jeffrey P. Gambino, Eric A. Joseph, Anthony C. Speranza
  • Patent number: 10224225
    Abstract: An apparatus and an associated method. The apparatus includes a chuck, an array of three or more ultrasonic sensors, a ceramic ring surrounding the chuck, and a controller connected to the ultrasonic sensors. The chuck is configured to removeably hold a substrate for processing. Each ultrasonic sensor may send a respective ultrasonic sound wave to a respective preselected peripheral region of the substrate and receive a respective return ultrasonic sound wave from the preselected peripheral region. The controller may compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave for each ultrasonic sensor. The method compares a measured position of the substrate on the chuck to a specified position on the chuck.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Matthew D. Moon, Timothy D. Sullivan
  • Patent number: 10078183
    Abstract: The disclosure relates to semiconductor structures and, more particularly, to waveguide structures used in phonotics chip packaging and methods of manufacture. The structure includes: a first die comprising photonics functions including a waveguide structure; a second die bonded to the first die and comprising CMOS logic functions; and an optical fiber optically coupled to the waveguide structure and positioned within a cavity formed in the second die.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: September 18, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Prakash Periasamy, Donald R. Letourneau
  • Publication number: 20180240694
    Abstract: An apparatus and an associated method. The apparatus includes a chuck, an array of three or more ultrasonic sensors, a ceramic ring surrounding the chuck, and a controller connected to the ultrasonic sensors. The chuck is configured to removeably hold a substrate for processing. Each ultrasonic sensor may send a respective ultrasonic sound wave to a respective preselected peripheral region of the substrate and receive a respective return ultrasonic sound wave from the preselected peripheral region. The controller may compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave for each ultrasonic sensor. The method compares a measured position of the substrate on the chuck to a specified position on the chuck.
    Type: Application
    Filed: April 19, 2018
    Publication date: August 23, 2018
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Matthew D. Moon, Timothy D. Sullivan
  • Patent number: 9997385
    Abstract: An apparatus and an associated method. The apparatus includes a chuck in a process chamber, an array of three or more ultrasonic sensors in the process chamber, a ceramic ring surrounding the chuck, and a controller connected to the ultrasonic sensors. The chuck is configured to removeably hold a substrate for processing. Each ultrasonic sensor may send a respective ultrasonic sound wave to a respective preselected peripheral region of the substrate and receive a respective return ultrasonic sound wave from the preselected peripheral region. The controller may compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave for each ultrasonic sensor. The method compares a measured position of the substrate on the chuck to a specified position on the chuck.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: June 12, 2018
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Matthew D. Moon, Timothy D. Sullivan
  • Publication number: 20170221742
    Abstract: An apparatus and an associated method. The apparatus includes a chuck in a process chamber, an array of three or more ultrasonic sensors in the process chary a ceramic ring surrounding the chuck, and a controller connected to the ultrasonic sensors. The chuck is configured to removeably hold a substrate for processing. Each ultrasonic sensor may send a respective ultrasonic sound wave to a respective preselected peripheral region of the substrate and receive a respective return ultrasonic sound wave from the preselected peripheral region. The controller may compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave for each ultrasonic sensor. The method compares a measured position of the substrate on the chuck to a specified position on the chuck.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Matthew D. Moon, Timothy D. Sullivan
  • Patent number: 9685362
    Abstract: An apparatus and method for centering substrates determining on a chuck. The apparatus includes a chuck in a process chamber, the chuck configured to removeably hold a substrate for processing; an array of two or more ultrasonic sensors arranged in the process chamber, each ultrasonic sensor arranged relative to the chuck so as to send a respective ultrasonic sound wave to a respective preselected region of the substrate and receive a respective return ultrasonic sound wave from the preselected region of the substrate; and a controller connected to each ultrasonic sensor and configured to compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave from each ultrasonic sensor.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: June 20, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Matthew D. Moon, Timothy D. Sullivan
  • Publication number: 20170168242
    Abstract: The disclosure relates to semiconductor structures and, more particularly, to waveguide structures used in phonotics chip packaging and methods of manufacture. The structure includes: a first die comprising photonics functions including a waveguide structure; a second die bonded to the first die and comprising CMOS logic functions; and an optical fiber optically coupled to the waveguide structure and positioned within a cavity formed in the second die.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 15, 2017
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Prakash Periasamy, Donald R. Letourneau
  • Publication number: 20170117195
    Abstract: An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a movable stage configured to hold a substrate; an inspection and analysis probe; a heat source; a gas injector; and a gas manifold connecting multiple gas sources to the gas injector.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Shawn A. Adderly, Jeffrey P. Gambino, Eric A. Joseph, Anthony C. Speranza
  • Patent number: 9583401
    Abstract: An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a movable stage configured to hold a substrate; an inspection and analysis probe; a heat source; a gas injector; and a gas manifold connecting multiple gas sources to the gas injector.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Jeffrey P. Gambino, Eric A. Joseph, Anthony C. Speranza
  • Patent number: 9576863
    Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: February 21, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Kyle Babinski, Daniel A. Delibac, David A. DeMuynck, Shawn R. Goddard, Matthew D. Moon, Melissa J. Roma, Craig E. Schneider
  • Patent number: 9543219
    Abstract: A method of monitoring a temperature of a plurality of regions in a substrate during a deposition process, the monitoring of the temperature including: forming, in the monitored plurality of regions, a plurality of metal structures each with a different metal pattern density, where each metal pattern density corresponds to a threshold temperature at or above which metal voids and surface roughness are formed in the plurality of metal structures, and detecting metal voids and surface roughness in the plurality of metal structures to determine the temperature of the monitored plurality of regions.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: January 10, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Mark J. Esposito, Jeffrey P. Gambino, Prakash Periasamy
  • Patent number: 9508578
    Abstract: An apparatus and method for leak detection of coolant gas from a chuck. The apparatus includes a chuck having a top surface and configured to clamp a substrate to the top surface, the chuck having one or more recessed regions in the top surface, the recessed regions configured to allow a cooling gas to contact a backside of the substrate; a cooling gas inlet and a cooling gas outlet connected to the one or more recessed regions; a first measurement device connected to the cooling gas inlet and configured to measure a first amount of cooling gas entering the cooling gas inlet and a second measurement device connected to the cooling gas outlet and configured to measure a second amount of cooling gas exiting from the cooling gas outlet; and a controller configured to determine a difference between the first amount of cooling gas and the second amount of cooling gas.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: November 29, 2016
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Jed H. Rankin, Timothy D. Sullivan
  • Publication number: 20160181166
    Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 23, 2016
    Applicant: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Kyle Babinski, Daniel A. Delibac, David A. DeMuynck, Shawn R. Goddard, Matthew D. Moon, Melissa J. Roma, Craig E. Schneider
  • Publication number: 20160155675
    Abstract: A method of monitoring a temperature of a plurality of regions in a substrate during a deposition process, the monitoring of the temperature including: forming, in the monitored plurality of regions, a plurality of metal structures each with a different metal pattern density, where each metal pattern density corresponds to a threshold temperature at or above which metal voids and surface roughness are formed in the plurality of metal structures, and detecting metal voids and surface roughness in the plurality of metal structures to determine the temperature of the monitored plurality of regions.
    Type: Application
    Filed: December 2, 2014
    Publication date: June 2, 2016
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Mark J. Esposito, Jeffrey P. Gambino, Prakash Periasamy
  • Patent number: 9330988
    Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: May 3, 2016
    Assignee: International Business Machines Corporation
    Inventors: Shawn A. Adderly, Kyle Babinski, Daniel A. Delibac, David A. DeMuynck, Shawn R. Goddard, Matthew D. Moon, Melissa J. Roma, Craig E. Schneider
  • Patent number: 9275868
    Abstract: Substrates (wafers) with uniform backside roughness and methods of manufacture are disclosed. The method includes forming a material on a backside of a wafer. The method further includes patterning the material to expose portions of the backside of the wafer. The method further includes roughening the backside of the wafer through the patterned material to form a uniform roughness.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: March 1, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Shawn A. Adderly, Jeffrey P. Gambino, Max L. Lifson, Matthew D. Moon, William J. Murphy, Timothy D. Sullivan, David C. Thomas
  • Patent number: 9201806
    Abstract: In a particular embodiment, a method of anticipatorily loading a page of memory is provided. The method may include, during execution of first program code using a first page of memory, collecting data for at least one attribute of the first page of memory, including collecting data about at least one next page of memory that interacts with the first page of memory for a historical topology attribute of the first page of memory. The method may also include, during execution of second program code using the first page of memory, determining a second page of memory to anticipatorily load based on the historical topology attribute of the first page of memory.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: December 1, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shawn A. Adderly, Paul A Niekrewicz, Aydin Suren, Sebastian T. Ventrone
  • Patent number: 9196519
    Abstract: Embodiments of the present invention provide a method for achieving uniform capacitance between a semiconductor wafer and an electrostatic chuck. In certain embodiments, the method comprises the step of forming a layer on a first side of the semiconductor wafer, wherein the layer has a specified resistivity. The method further comprises placing the semiconductor wafer on the electrostatic chuck, wherein the layer contacts the electrostatic chuck. The method further comprises applying a radio frequency signal to the electrostatic chuck, and processing a second side of the semiconductor wafer.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: November 24, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Shawn A. Adderly, Jeffrey P. Gambino, William J. Murphy, Jonathan D. Chapple-Sokol
  • Publication number: 20150235881
    Abstract: An apparatus and method for centering substrates determining on a chuck. The apparatus includes a chuck in a process chamber, the chuck configured to removeably hold a substrate for processing; an array of two or more ultrasonic sensors arranged in the process chamber, each ultrasonic sensor arranged relative to the chuck so as to send a respective ultrasonic sound wave to a respective preselected region of the substrate and receive a respective return ultrasonic sound wave from the preselected region of the substrate; and a controller connected to each ultrasonic sensor and configured to compare a measured position of the substrate on the chuck to a specified placement of the substrate on the chuck based on a measured elapsed time between sending the ultrasonic sound wave and receiving the return ultrasonic sound wave from each ultrasonic sensor.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shawn A. Adderly, Samantha D. DiStefano, Jeffrey P. Gambino, Max G. Levy, Max L. Lifson, Matthew D. Moon, Timothy D. Sullivan