Abstract: Techniques to adjust a gain of an analog-to-digital converter circuit (ADC) and/or an ADC full scale from one sample to the next of an analog input signal to compensate for the signal loss over distance, which can increase an effective dynamic range of the system. The benefit of compensating for the signal loss due to distance is that a data interface between the ADC of the receiver of the LIDAR system and a signal processor no longer needs to support the dynamic range from the range specification.

Abstract: This disclosure is directed to, among other things, techniques to quickly replenish a capacitance of a laser diode driver circuit after an optical pulse, which can enable a burst of pulses (more than one pulse), such as to enable pulse coding. An energy reservoir circuit can be coupled to a laser diode driver circuit and to a power supply circuit and configured to store enough energy to fire the RD laser diode driver more than once. The energy reservoir circuit can act as an intermediate interface between the RD laser diode driver and the power supply circuit to better optimize the current requirements of each block.

Abstract: Laser driver designs that aim to reduce or eliminate the problem of fault laser firing are disclosed. Various laser driver designs presented herein are based on providing a current dissipation path that is configured to start providing a resistance for dissipating at least a portion, but preferably substantially all, of the negative current from the laser diode. Dissipating at least a portion of the negative current may decrease the unintentional increase of the voltage at the input to the laser diode and, therefore, reduce the likelihood that fault laser firing will occur. A control logic may be used to control the timing of when the current dissipation path is activated (i.e., provides the resistance to dissipate the negative current from the laser diode) and when it is deactivated.

Abstract: Techniques to adjust a gain of an analog-to-digital converter circuit (ADC) and/or an ADC full scale from one sample to the next of an analog input signal to compensate for the signal loss over distance, which can increase an effective dynamic range of the system. The benefit of compensating for the signal loss due to distance is that a data interface between the ADC of the receiver of the LIDAR system and a signal processor no longer needs to support the dynamic range from the range specification.

Abstract: This disclosure is directed to, among other things, techniques to quickly replenish a capacitance of a laser diode driver circuit after an optical pulse, which can enable a burst of pulses (more than one pulse), such as to enable pulse coding. An energy reservoir circuit can be coupled to a laser diode driver circuit and to a power supply circuit and configured to store enough energy to fire the RD laser diode driver more than once. The energy reservoir circuit can act as an intermediate interface between the RD laser diode driver and the power supply circuit to better optimize the current requirements of each block.

Abstract: Techniques to achieve higher power/shorter pulses with a laser diode. By initially applying a static reverse bias across the laser diode, the laser diode can turn on at a larger inductor current. When the laser diode is initially reverse biased, depletion charge and diffusion charge can be populated before the laser diode will lase. This causes the laser diode to initially turn on at a larger inductor current, which will reduce the rise time, thereby achieving higher power/shorter pulses.

Abstract: Laser driver designs that aim to reduce or eliminate the problem of fault laser firing are disclosed. Various laser driver designs presented herein are based on providing a current dissipation path that is configured to start providing a resistance for dissipating at least a portion, but preferably substantially all, of the negative current from the laser diode. Dissipating at least a portion of the negative current may decrease the unintentional increase of the voltage at the input to the laser diode and, therefore, reduce the likelihood that fault laser firing will occur. A control logic may be used to control the timing of when the current dissipation path is activated (i.e., provides the resistance to dissipate the negative current from the laser diode) and when it is deactivated.

Abstract: Techniques to achieve higher power/shorter pulses with a laser diode. By initially applying a static reverse bias across the laser diode, the laser diode can turn on at a larger inductor current. When the laser diode is initially reverse biased, depletion charge and diffusion charge can be populated before the laser diode will lase. This causes the laser diode to initially turn on at a larger inductor current, which will reduce the rise time, thereby achieving higher power/shorter pulses.

Abstract: Techniques that can prevent the low dropout (LDO) output voltage degradation that occurs with conventional LDO regulators, even with large LDO supply variations. An LDO regulator circuit can include another loop that is much slower than the main LDO regulator loop, concentrates the load regulation, and fixes the voltage regulation runaway problem due to the large supply variation with large frequency content. The LDO regulator circuit can include a negative feedback correction loop that corrects the LDO output by, in some examples, adding sink current to the main voltage regulation loop via a programmable current sink element.

Abstract: Techniques are described to encode a single light pulse with information that can provide the benefits of a single long pulse and a short, coded pulse train. For example, techniques are described to generate a light pulse for transmission that has an optical intensity profile that includes a waveform having one or more relatively narrower pulses superimposed upon a relatively wider pulse. Thus, a hybrid pulse can be generated that includes both a wide pulse and a narrow pulse train portion, for example, superimposed thereon.

Abstract: Adaptive toggle number compensation techniques for reducing data dependent supply noise in DACs are disclosed. Various embodiments are based on setting a certain target toggle number for a plurality of DAC units used to convert at least a portion of a digital data sample and then applying various adaptive techniques to try to achieve the target toggle number in converting the data sample from digital to analog domain. Adaptive toggle number compensation techniques described herein try to reduce data dependent supply noise by deliberately limiting, to a certain target number, the number of DAC units that undergo a switch from the digital input of 1 to 0 or from 0 to 1 in converting a digital data sample. Compared to the conventional dummy signal generation approach, such adaptive toggle number compensation techniques may provide significant savings in terms of power consumption of a DAC.

Abstract: A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.

Abstract: A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.

Abstract: A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.

Abstract: A clock system including a ring oscillator having a plurality of cascaded inverters, each of the cascaded inverters having a pair of inputs coupled to outputs of a respectively adjacent inverter stage and having a pair of outputs coupled to inputs of another respectively adjacent inverter stage, each inverter stage having a common mode control circuit provided therein, and a feedback controller adapted to transmit a control signal to the common mode control circuit of at least one of the inverters.

Abstract: A multi-stage clock distribution circuit for an integrated circuit is provided. The clock distribution circuit may route a common clock signal to a plurality of clock receiver circuits. Each stage in the distribution circuit may include a plurality of buffers. Outputs of at least some, perhaps all, of the buffers may be connected to each other by an interconnect. The interconnect may align clock signals that are output by the interconnected buffers and thereby encourage synchronization of those clock signals. Other stages of the clock distribution signal may be connected as well.

Abstract: A clock system including a ring oscillator having a plurality of cascaded inverters, each of the cascaded inverters having a pair of inputs coupled to outputs of a respectively adjacent inverter stage and having a pair of outputs coupled to inputs of another respectively adjacent inverter stage, each inverter stage having a common mode control circuit provided therein, and a feedback controller adapted to transmit a control signal to the common mode control circuit of at least one of the inverters.