Patents by Inventor Shay Galanti

Shay Galanti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070036007
    Abstract: A method for programming in parallel reference cells to be used for operating other cells of a memory cell array, the method including: a) reading each of the reference cells of a memory cell array with a sense amplifier, the sense amplifier providing an output indicative of a programmed state of the reference cell relative to another bit in the array, b) reading each of the reference cells of a memory cell array with a sense amplifier while using read conditions to determine if the reference cells have reached a target level, c) determining if a programming pulse should be applied to the reference cell by comparing the output of the sense amplifier to a predefined target “0” or “1”, d) setting a buffer bit, corresponding to the output of the sense amplifier, in a sticky bit buffer to a first logical state if the reference cell needs to be programmed, and not changing a logical state of the buffer bit if the reference cell does not need to be programmed, e) performing steps a)-d) for a desired address range i
    Type: Application
    Filed: August 9, 2005
    Publication date: February 15, 2007
    Applicant: Saifun Semiconductors, Ltd.
    Inventors: Ameet Lann, Kobi Danon, Mori Edan, Shay Galanti