Patents by Inventor Sheldon D. Haynie

Sheldon D. Haynie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8492255
    Abstract: A Schottky diode with a small footprint and a high-current carrying ability is fabricated by forming an opening that extends into an n-type semiconductor material. The opening is then lined with a metallic material such as platinum. The metallic material is then heated to form a salicide region where the metallic material touches the n-type semiconductor material.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: July 23, 2013
    Assignee: National Semiconductor Corporation
    Inventors: Sheldon D. Haynie, Ann Gabrys
  • Publication number: 20120175724
    Abstract: A Schottky diode with a small footprint and a high-current carrying ability is fabricated by forming an opening that extends into an n-type semiconductor material. The opening is then lined with a metallic material such as platinum. The metallic material is then heated to form a salicide region where the metallic material touches the n-type semiconductor material.
    Type: Application
    Filed: January 6, 2011
    Publication date: July 12, 2012
    Inventors: Sheldon D. Haynie, Ann Gabrys
  • Publication number: 20040222485
    Abstract: A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending through the buried oxide to contact the substrate, providing for electrical and thermal coupling between the element and the substrate and for gettering impurities during processing. A device fabrication process employs a selective silicon-on-insulator (SOI) technique including forming trenches in the substrate; passivating the upper portion of the element; and performing a long oxidation to create the buried oxide layer. A second oxidation is used to create an insulating oxide layer on the sidewalls of the semiconductor element, and polysilicon material is used to fill the trenches and to create the post.
    Type: Application
    Filed: June 4, 2004
    Publication date: November 11, 2004
    Inventors: Sheldon D. Haynie, Steven L. Merchant, Sameer P. Pendharkar, Vladimir Bolkhovsky
  • Patent number: 6800917
    Abstract: A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending through the buried oxide to contact the substrate, providing for electrical and thermal coupling between the element and the substrate and for gettering impurities during processing. A device fabrication process employs a selective silicon-on-insulator (SOI) technique including forming trenches in the substrate; passivating the upper portion of the element; and performing a long oxidation to create the buried oxide layer. A second oxidation is used to create an insulating oxide layer on the sidewalls of the semiconductor element, and polysilicon material is used to fill the trenches and to create the post.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: October 5, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Sheldon D. Haynie, Steven L. Merchant, Sameer P. Pendharkar, Vladimir Bolkhovsky
  • Patent number: 6797547
    Abstract: A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending through the buried oxide to contact the substrate, providing for electrical and thermal coupling between the element and the substrate and for gettering impurities during processing. A device fabrication process employs a selective silicon-on-insulator (SOI) technique including forming trenches in the substrate; passivating the upper portion of the element; and performing a long oxidation to create the buried oxide layer. A second oxidation is used to create an insulating oxide layer on the sidewalls of the semiconductor element, and polysilicon material is used to fill the trenches and to create the post.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: September 28, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Sheldon D. Haynie, Steven L. Merchant, Sameer P. Pendharkar, Vladimir Bolkhovsky
  • Publication number: 20040129976
    Abstract: A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending through the buried oxide to contact the substrate, providing for electrical and thermal coupling between the element and the substrate and for gettering impurities during processing. A device fabrication process employs a selective silicon-on-insulator (SOI) technique including forming trenches in the substrate; passivating the upper portion of the element; and performing a long oxidation to create the buried oxide layer. A second oxidation is used to create an insulating oxide layer on the sidewalls of the semiconductor element, and polysilicon material is used to fill the trenches and to create the post.
    Type: Application
    Filed: October 3, 2003
    Publication date: July 8, 2004
    Inventors: Sheldon D. Haynie, Steven L. Merchant, Sameer P. Pendharkar, Vladimir Bolkhovsky
  • Publication number: 20040113223
    Abstract: A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending through the buried oxide to contact the substrate, providing for electrical and thermal coupling between the element and the substrate and for gettering impurities during processing. A device fabrication process employs a selective silicon-on-insulator (SOI) technique including forming trenches in the substrate; passivating the upper portion of the element; and performing a long oxidation to create the buried oxide layer. A second oxidation is used to create an insulating oxide layer on the sidewalls of the semiconductor element, and polysilicon material is used to fill the trenches and to create the post.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sheldon D. Haynie, Steven L. Merchant, Sameer P. Pendharkar, Vladimir Bolkhovsky
  • Publication number: 20030025154
    Abstract: A semiconductor device includes a gate to control the semiconductor device, a drain coupled to the gate, a source to form a current path with the drain, which is formed in a well of a first type of material, a field oxide coupled to the gate, and a channel stop formed under the field oxide and formed of a second type of material.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Inventor: Sheldon D. Haynie