Abstract: Provided is a binarization method for CT sectional image of fiber package containing artifacts, which includes: performing brightness adjustment on the source image obtained after converting of the HSV image model by using a composite tangent function; creating a planar morphological structural element having a morphology similar to that of a target object to obtain a background image without the target object; obtaining a second intermediate image by a subtraction operation of the first intermediate image and the background image; improving an image contrast of the second intermediate image again to obtain a third intermediate image; and binarizing the third intermediate image by using a local adaptive threshold binarization algorithm and removing a background noise to obtain a final binarized image. The binarization method can improve the uneven brightness of the image under complex illumination, alleviate the artifacts, and strip similar objects from the background with similar gray scales.

Abstract: The present disclosure provides a multi-phase clock signal phase difference detection and calculation circuit and method, and a digital phase modulation system. The detection and calculation circuit includes an auxiliary digital-to-time conversion circuit, a main digital-to-time conversion circuit, a phase detector, and a state machine. The auxiliary digital-to-time conversion circuit selects a first phase clock signal and outputs an auxiliary clock signal, adjusts the phase of the auxiliary clock signal; the phase detector detects the phases of the auxiliary clock signal and a target clock signal output by the main digital-to-time conversion circuit; the state machine adjusts the phase of the auxiliary clock signal, and adjusts the phase of the target clock signal. When the phase difference between the two signals is zero, the amount of phase adjustment by the main digital-to-time conversion circuit is the phase difference between the first phase clock signal and the second phase clock signal.

Abstract: Provided are an ingot growth device and growth method. The ingot growth device includes a furnace body, a crucible, a cooling jacket and a reflector, wherein the cooling jacket is arranged inside the furnace body to cool the ingot, the reflector is arranged on a periphery of the cooling jacket, the reflector includes an upper reflector part and a lower reflector part, the upper reflector part is cylindrical and surrounds the cooling jacket, the lower reflector part is arranged at a lower end of the upper reflector part and is located on a lower side of the cooling jacket, the lower reflector part is of a hollow circular truncated cone structure with a large top and a small bottom, a groove is formed on an inner peripheral wall of the circular truncated cone structure, the top of the groove penetrates through the circular truncated cone structure.

Abstract: A touch-and-display device operated with an active stylus is provided. A touch position is detected in a touch detection period. An uplink signal is transmitted and a downlink signal is detected in a stylus detection period. When the downlink signal is detected, it is determined if a distance between a stylus position and the touch position is less than or equal to a first predetermined distance. A stylus mode is not entered if the determination result is affirmative.

Abstract: A touch display apparatus is disclosed, which includes a touch display panel and a driving circuit. The touch display panel is configured for display and touch sensing, which includes plural touch sensing pads arranged in touch sensing groups. The driving circuit is coupled to the touch display panel, and is configured to drive the touch display panel to perform display with respect to common voltage signal at a display stage of a frame period and to drive the touch display panel to perform touch sensing by applying a touch detection signal to all of the touch sensing pads simultaneously at a touch sensing stage of the frame period.

Abstract: A low noise amplifier includes a preamplifier, first differential amplifiers, second differential amplifiers, a signal adder, and a load circuit. The preamplifier receives an input signal, and amplifies the input signal to generate a first signal. The input signal and the first signal have the same phase. The first differential amplifiers receive the first signal and a first reference signal and generate a first output differential signal pair. The second differential amplifiers receive the input signal and a second reference signal and generate a second output differential signal pair. The signal adder adds up the first output differential signal pair and the second output differential signal pair. The load circuit is coupled to the signal adder, and generates a third output differential signal pair according to the addition result.

Abstract: The present disclosure provides a reference clock signal injected phase locked loop circuit and an offset calibration method. The reference clock signal injected phase locked loop circuit includes a first pulse generator, a second pulse generator, a state machine, a pulse selection and amplification circuit, a voltage controlled delay line, a phase detector, and a filter, and forms an offset calibration loop, a phase locked loop, a voltage controlled oscillator loop, and an injection locked loop. The state machine disconnects the phase locked loop and the voltage controlled oscillator loop and enables the offset calibration loop to calibrate the phase detector; the state machine enables the phase locked loop and the voltage controlled oscillator loop and locks a signal of the second pulse generator; and the state machine enables the injection locked loop for injecting a first pulse signal of the first pulse generator.

Abstract: A touch panel includes a first electrode layer and a second electrode layer. The first electrode layer has transmitting electrodes arranged in transmitting channels and traces respectively coupled to the transmitting channels. The second electrode layer has receiving electrodes arranged in receiving channels. At least one of the traces, the transmitting channels and one of the receiving channels in proximity of the traces form touch detection blocks that respectively correspond to the transmitting channels. For each touch detection block, in a circle area overlapped with at least one of the traces and substantially in the touch detection block corresponding to one of the transmitting channels, a summation of areas of the corresponded transmitting channel and the trace coupled to the corresponded transmitting channel is substantially larger than a summation of areas of the other transmitting channels and the other traces.

Abstract: A sensor pattern and a capacitive touch screen are provided. The sensor pattern comprises: a plurality of unit blocks, and a first unit block of the unit blocks comprises: a first 1st-type sensor element, a first 2nd-type sensor element, and a second 2nd-type sensor element. The first 1st-type sensor element is disposed on a first patterned layer, having a border trace, two parallel main traces, a bridge, a first cell, and a second cell, wherein the first and second cells are not aligned. The first 2nd-type sensor element is disposed on a second patterned layer, having a main trace and a sub-trace, wherein the main trace surrounds the first cell of the first 1st-type sensor element. The second 2nd-type sensor element is disposed on the second patterned layer, having a main trace and a sub-trace, wherein the main trace surrounds the second cell of the first 1st-type sensor element.

Abstract: The present disclosure provides a linear calibration system for a time-to-digital converter and a method thereof, and a digital phase-locked loop. The linear calibration system includes a digitally controlled reference delay circuit for receiving a first clock signal and delaying the first clock signal to generate a reference clock signal, a time-to-digital conversion circuit including at least two time-to-digital converters, and a state machine. The time-to-digital conversion circuit receives the first clock signal and the reference clock signal, delays the first clock signal to generate a first delay signal, compares a phase of the first delay signal with a phase of the reference clock signal, and outputs a phase detection result signal. The state machine generates a delay control signal for controlling the digitally controlled reference delay circuit, adjusts a calibration control signal to align the phases of the first delay signal and the reference clock signal.

Abstract: A low noise amplifier includes a preamplifier, first differential amplifiers, second differential amplifiers, a signal adder, and a load circuit. The preamplifier receives an input signal, and amplifies the input signal to generate a first signal. The input signal and the first signal have the same phase. The first differential amplifiers receive the first signal and a first reference signal and generate a first output differential signal pair. The second differential amplifiers receive the input signal and a second reference signal and generate a second output differential signal pair. The signal adder adds up the first output differential signal pair and the second output differential signal pair. The load circuit is coupled to the signal adder, and generates a third output differential signal pair according to the addition result.

Abstract: The present disclosure provides a linear calibration system for a time-to-digital converter and a method thereof, and a digital phase-locked loop. The linear calibration system includes a digitally controlled reference delay circuit for receiving a first clock signal and delaying the first clock signal to generate a reference clock signal, a time-to-digital conversion circuit including at least two time-to-digital converters, and a state machine. The time-to-digital conversion circuit receives the first clock signal and the reference clock signal, delays the first clock signal to generate a first delay signal, compares a phase of the first delay signal with a phase of the reference clock signal, and outputs a phase detection result signal. The state machine generates a delay control signal for controlling the digitally controlled reference delay circuit, adjusts a calibration control signal to align the phases of the first delay signal and the reference clock signal.

Abstract: The present disclosure provides a multi-phase clock signal phase difference detection and calculation circuit and method, and a digital phase modulation system. The detection and calculation circuit includes an auxiliary digital-to-time conversion circuit, a main digital-to-time conversion circuit, a phase detector, and a state machine. The auxiliary digital-to-time conversion circuit selects a first phase clock signal and outputs an auxiliary clock signal, adjusts the phase of the auxiliary clock signal; the phase detector detects the phases of the auxiliary clock signal and a target clock signal output by the main digital-to-time conversion circuit; the state machine adjusts the phase of the auxiliary clock signal, and adjusts the phase of the target clock signal. When the phase difference between the two signals is zero, the amount of phase adjustment by the main digital-to-time conversion circuit is the phase difference between the first phase clock signal and the second phase clock signal.

Abstract: The present disclosure provides a reference clock signal injected phase locked loop circuit and an offset calibration method. The reference clock signal injected phase locked loop circuit includes a first pulse generator, a second pulse generator, a state machine, a pulse selection and amplification circuit, a voltage controlled delay line, a phase detector, and a filter, and forms an offset calibration loop, a phase locked loop, a voltage controlled oscillator loop, and an injection locked loop. The state machine disconnects the phase locked loop and the voltage controlled oscillator loop and enables the offset calibration loop to calibrate the phase detector; the state machine enables the phase locked loop and the voltage controlled oscillator loop and locks a signal of the second pulse generator; and the state machine enables the injection locked loop for injecting a first pulse signal of the first pulse generator.

Abstract: A radio frequency (RF) signal transceiver is provided. The RF signal transceiver includes a first transformer, a signal transceiving processor, a signal receiving amplifier, and a signal transmitting amplifier. The first transformer is coupled to an antenna through a first end of a primary side, and two endpoints of a secondary side of the first transformer receive and transmit a pair of differential signals. The signal transceiving processor receives a pair of input differential signals from the secondary side of the first transformer and generates a pair of processed differential signals. The signal receiving amplifier is coupled to the signal transceiving processor and is configured to receive and amplify the pair of processed differential signals. The signal transmitting amplifier is coupled to the secondary side of the first transformer and provides a pair of transmission differential signals to the secondary side.

Abstract: A radio frequency (RF) signal transceiver is provided. The RF signal transceiver includes a first transformer, a signal transceiving processor, a signal receiving amplifier, and a signal transmitting amplifier. The first transformer is coupled to an antenna through a first end of a primary side, and two endpoints of a secondary side of the first transformer receive and transmit a pair of differential signals. The signal transceiving processor receives a pair of input differential signals from the secondary side of the first transformer and generates a pair of processed differential signals. The signal receiving amplifier is coupled to the signal transceiving processor and is configured to receive and amplify the pair of processed differential signals. The signal transmitting amplifier is coupled to the secondary side of the first transformer and provides a pair of transmission differential signals to the secondary side.

Abstract: A touch panel includes a first electrode layer and a second electrode layer. The first electrode layer has transmitting electrodes arranged in transmitting channels and traces respectively coupled to the transmitting channels. The second electrode layer has receiving electrodes arranged in receiving channels. At least one of the traces, the transmitting channels and one of the receiving channels in proximity of the traces form touch detection blocks that respectively correspond to the transmitting channels. For each touch detection block, in a circle area overlapped with at least one of the traces and substantially in the touch detection block corresponding to one of the transmitting channels, a summation of areas of the corresponded transmitting channel and the trace coupled to the corresponded transmitting channel is substantially larger than a summation of areas of the other transmitting channels and the other traces.

Abstract: A touch system includes channel electrodes that are mapped to touch pixels such that a number of the channel electrodes in each dimension is lower than a number of the touch pixels in said dimension. In one embodiment, each channel electrode has different adjacent channel electrodes at different positions of the mapped touch pixel. In another embodiment, each touch pixel in said dimension is laterally extended to at least one adjacent touch pixel in said dimension. In a further embodiment, original sensing channel electrodes and mirrored sensing channel electrodes are alternately corresponded to the driving channel electrodes.

Abstract: A sensing unit in the touch panel includes a first electrode formed in a first film and a second electrode formed in a second film. The first electrode includes multiple extending portions and at least one connecting portion. The extending portions extend along a first direction. The connecting portion extends along a second direction which is different from the first direction. The extending portions are spaced from each other by a distance along the second direction, and the connecting portion connects the extending portions. The second electrode includes a circular pad having an opening. The extending portions at least partially overlap with the circular pad, and the connecting portion is formed in an area overlapping with the opening.

Abstract: A reflected-capacitive touch panel of a wearable electronic device includes a center touch sensing portion composed of a plurality of mutual-capacitance sensors; a border touch sensing portion composed of a plurality of hybrid self-capacitance and mutual-capacitance sensors; and a predetermined bonding area into which channels of the center touch sensing portion and the border touch sensing portion are routed.