Patents by Inventor Shen Hu
Shen Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967123Abstract: Provided is a binarization method for CT sectional image of fiber package containing artifacts, which includes: performing brightness adjustment on the source image obtained after converting of the HSV image model by using a composite tangent function; creating a planar morphological structural element having a morphology similar to that of a target object to obtain a background image without the target object; obtaining a second intermediate image by a subtraction operation of the first intermediate image and the background image; improving an image contrast of the second intermediate image again to obtain a third intermediate image; and binarizing the third intermediate image by using a local adaptive threshold binarization algorithm and removing a background noise to obtain a final binarized image. The binarization method can improve the uneven brightness of the image under complex illumination, alleviate the artifacts, and strip similar objects from the background with similar gray scales.Type: GrantFiled: November 1, 2023Date of Patent: April 23, 2024Assignee: XIDIAN UNIVERSITYInventors: Tengyin Shi, Yiqun Zhang, Zhuo Zhang, Hongzhang Feng, Shen Li, Dongwu Yang, Naigang Hu, Yongxi He
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Patent number: 11925014Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.Type: GrantFiled: December 8, 2021Date of Patent: March 5, 2024Assignee: Micron Technology, Inc.Inventors: Song Guo, Sanh D. Tang, Shen Hu, Yan Li, Nicholas R. Tapias
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Publication number: 20230117730Abstract: A battery pack including cells, a circuit board, a first adapter strip, and a second adapter strip. Each of the cells includes tabs. The first adapter strip is connected to the tabs of two adjacent cells by welding. The second adapter strip is welded to the circuit board and connected to the first adapter strip by welding. The battery pack implements electrical connection to the tabs of the cells through the first adapter strip, and is electrically connected to the first adapter strip and the circuit board separately through the second adapter strip, to electrically connect the cells to the circuit board. The circuit board directly collects information on the tabs of each cell, without requiring structures like copper bars, transfer circuit board, and flexible printed circuit board.Type: ApplicationFiled: December 16, 2022Publication date: April 20, 2023Applicant: Dongguan Poweramp Technology LimitedInventors: Mingjie WU, Shen HU
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Patent number: 11469103Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.Type: GrantFiled: January 21, 2021Date of Patent: October 11, 2022Assignee: Micron Technology, Inc.Inventors: Nicholas R. Tapias, Sanjeev Sapra, Anish A. Khandekar, Shen Hu
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Patent number: 11387369Abstract: An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.Type: GrantFiled: December 20, 2019Date of Patent: July 12, 2022Assignee: Micron Technology, Inc.Inventors: Shen Hu, Hung-Wei Liu, Xiao Li, Zhiqiang Xie, Corey Staller, Jeffery B. Hull, Anish A. Khandekar, Thomas A. Figura
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Patent number: 11322388Abstract: An example method includes patterning a working surface of a semiconductor wafer. The example method includes performing a first deposition of a dielectric material in high aspect ratio trenches. The example method further includes performing a high pressure, high temperature vapor etch to recess the dielectric material in the trenches and performing a second deposition of the dielectric material to continue filling the trenches.Type: GrantFiled: August 23, 2019Date of Patent: May 3, 2022Assignee: Micron Technology, Inc.Inventors: Vivek Yadav, Shen Hu, Kangle Li, Sanjeev Sapra
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Publication number: 20220102351Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.Type: ApplicationFiled: December 8, 2021Publication date: March 31, 2022Inventors: Song Guo, Sanh D. Tang, Shen Hu, Yan Li, Nicholas R. Tapias
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Patent number: 11201154Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.Type: GrantFiled: December 27, 2019Date of Patent: December 14, 2021Assignee: Micron Technology, Inc.Inventors: Song Guo, Sanh D. Tang, Shen Hu, Yan Li, Nicholas R. Tapias
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Publication number: 20210202487Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.Type: ApplicationFiled: December 27, 2019Publication date: July 1, 2021Inventors: Song Guo, Sanh D. Tang, Shen Hu, Yan Li, Nicholas R. Tapias
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Publication number: 20210193843Abstract: An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.Type: ApplicationFiled: December 20, 2019Publication date: June 24, 2021Inventors: Shen Hu, Hung-Wei Liu, Xiao Li, Zhiqiang Xie, Corey Staller, Jeffery B. Hull, Anish A. Khandekar, Thomas A. Figura
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Publication number: 20210143011Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.Type: ApplicationFiled: January 21, 2021Publication date: May 13, 2021Inventors: Nicholas R. Tapias, Sanjeev Sapra, Anish A. Khandekar, Shen Hu
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Publication number: 20210057266Abstract: An example method includes patterning a working surface of a semiconductor wafer. The example method includes performing a first deposition of a dielectric material in high aspect ratio trenches. The example method further includes performing a high pressure, high temperature vapor etch to recess the dielectric material in the trenches and performing a second deposition of the dielectric material to continue filling the trenches.Type: ApplicationFiled: August 23, 2019Publication date: February 25, 2021Inventors: Vivek Yadav, Shen Hu, Kangle Li, Sanjeev Sapra
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Patent number: 10930499Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.Type: GrantFiled: April 9, 2019Date of Patent: February 23, 2021Assignee: Micron Technology, Inc.Inventors: Nicholas R. Tapias, Sanjeev Sapra, Anish A. Khandekar, Shen Hu
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Publication number: 20200365596Abstract: Methods, apparatuses, and systems related to forming a semiconductor using hybrid oxidation are described. An example method includes forming an opening to create an isolation region in a semiconductor substrate. The example method further includes depositing a first dielectric into the isolation region at a first oxidation rate. The example method further includes depositing a second dielectric into the isolation region at a second oxidation rate.Type: ApplicationFiled: May 15, 2019Publication date: November 19, 2020Inventors: Somik Mukherjee, Shen Hu, Anish A. Khandekar, Sau Ha Cheung, Zhiqiang Xie
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Publication number: 20200328080Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.Type: ApplicationFiled: April 9, 2019Publication date: October 15, 2020Inventors: Nicholas R. Tapias, Sanjeev Sapra, Anish A. Khandekar, Shen Hu
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Patent number: 10026729Abstract: A surge-protection circuit for a chip is provided. The surge-protection circuit includes a detection element and a protection element. The detection element is embedded on the chip and arranged between a first terminal and a second terminal, and the detection element is utilized to detect whether an abrupt voltage variation occurs due to a surge or not and generate an enabling signal when the abrupt voltage variation occurs. The protection element is embedded on the chip and coupled to the detection element, and the protection element is utilized to adjust and reduce the abrupt voltage variation through bypassing high energy generated by the surge after receiving the enabling signal.Type: GrantFiled: December 24, 2014Date of Patent: July 17, 2018Assignee: MediaTek Inc.Inventors: Sheng-Fu Hsu, Je-Shen Hu
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Patent number: 9584052Abstract: A driving method for a spindle motor and associated driving system and apparatus are provided. The driving method includes the following steps. Plural modulation signals and plural floating phases corresponding to the plural modulation signals are adjusted. A floating period comes immediately after an active period of each of the plural modulation signals according to the plural floating phases. During the floating period, a demagnetization time of the spindle motor is acquired according to a first terminal voltage signal at a first terminal of the spindle motor. If the demagnetization time is not smaller than the threshold time period, the step of adjusting the plural modulation signals is repeatedly done. Whereas, if the demagnetization time is smaller than the threshold time period, after the demagnetization time, a phase of the spindle motor is obtained according to the first terminal voltage signal.Type: GrantFiled: February 24, 2015Date of Patent: February 28, 2017Assignee: MEDIATEK INC.Inventors: Ming-Kuang Chang, Chih-Lung Tai, Je-Shen Hu, Tzu-Ching Yang, Chi-Jui Lee
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Publication number: 20160248356Abstract: A driving method for a spindle motor and associated driving system and apparatus are provided. The driving method includes the following steps. Plural modulation signals and plural floating phases corresponding to the plural modulation signals are adjusted. A floating period comes immediately after an active period of each of the plural modulation signals according to the plural floating phases. During the floating period, a demagnetization time of the spindle motor is acquired according to a first terminal voltage signal at a first terminal of the spindle motor. If the demagnetization time is not smaller than the threshold time period, the step of adjusting the plural modulation signals is repeatedly done. Whereas, if the demagnetization time is smaller than the threshold time period, after the demagnetization time, a phase of the spindle motor is obtained according to the first terminal voltage signal.Type: ApplicationFiled: February 24, 2015Publication date: August 25, 2016Inventors: Ming-Kuang Chang, Chih-Lung Tai, Je-Shen Hu, Tzu-Ching Yang, Chi-Jui Lee
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Patent number: 9157126Abstract: The present invention relates to the identification of novel oral cancer and periodontal disease biomarkers. Further, the present invention provides novel methods of diagnosing and for providing a prognosis for oral cancer and periodontal disease. The present invention additionally provides novel methods of distinguishing between oral cancer and periodontal disease. Finally, kits are provided that find use in the practice of the methods of the invention.Type: GrantFiled: January 31, 2014Date of Patent: October 13, 2015Assignee: The Regents of the University of CaliforniaInventors: Shen Hu, David T. W. Wong
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Publication number: 20150262994Abstract: A surge-protection circuit for a chip is provided. The surge-protection circuit includes a detection element and a protection element. The detection element is embedded on the chip and arranged between a first terminal and a second terminal, and the detection element is utilized to detect whether an abrupt voltage variation occurs due to a surge or not and generate an enabling signal when the abrupt voltage variation occurs. The protection element is embedded on the chip and coupled to the detection element, and the protection element is utilized to adjust and reduce the abrupt voltage variation through bypassing high energy generated by the surge after receiving the enabling signal.Type: ApplicationFiled: December 24, 2014Publication date: September 17, 2015Inventors: Sheng-Fu HSU, Je-Shen HU