Abstract: End-to-end neural image compression using deep reinforcement learning (DRL) is performed by at least one processor and includes encoding an input, generating encoded representations of the input, generating a set of quantization keys using a first neural network, based on a set of previous quantization states, wherein each quantization key in the set of quantization keys and each previous quantization state in the set of previous quantization states correspond to the encoded representations of the input, generating a set of dequantized numbers representing dequantized representations of the encoded representations of the input, based on the set of quantization keys, using a second neural network, and generating a reconstructed output, based on the set of dequantized numbers.

Abstract: A method for secure data synchronization and sharing between distinct cloud environments is disclosed. The method involves establishing a trust relationship between a data provider's private cloud deployment and a data consumer's public cloud deployment. Utilizing hardware processors, a cross-region group sharing token is generated and validated to facilitate secure communication and data traffic between the two cloud deployments. Upon validation, a firewall policy that previously restricted data exchange is disabled, allowing for the replication of a target database from the private cloud to a secure share area accessible by the public cloud deployment. The data consumer is then enabled to access and utilize the replicated database within this secure area. The method ensures consistent data management across both deployments by managing the synchronization of the replicated database with the data provider's original database, thereby maintaining data consistency and integrity.

Abstract: An anti-diffusion substrate structure includes a substrate, a substrate circuit layer, and a chip. The substrate has multiple through holes. Within each of the through holes includes a first metal layer and an anti-diffusion layer plated on the first metal layer. The anti-diffusion layer is an Electroless Palladium Immersion Gold (EPIG) layer or an Electroless Nickel Electroless Palladium Immersion Gold (ENEPIG) layer. The substrate circuit layer is mounted on the substrate and extended on the anti-diffusion layer within each of the through holes. The substrate circuit layer is made of a second metal layer, and a composition of the second metal layer is different from a composition of the first metal layer. The chip is electrically connected to the substrate circuit layer. The anti-diffusion layer is able to better prevent material of the first metal layer from migrating or diffusing to the second metal layer.

Abstract: A three-dimensional (3D) scanning system includes a projector that generates an emitted light projected on an object, a reflected light being reflected from the object; a sensor that generates image data according to the reflected light; and a depth processor that generates depth data according to the image data and at least one modified factor representing corresponding deviation amount between the image data and an ideal image data due to a circle of confusion caused by the reflected light passing a lens of the sensor and then irradiating a sense plane of the sensor out of focus.

Abstract: A method for forming a chip package structure is provided. The method includes removing a first portion of a substrate to form a first recess in the substrate. The method includes forming a buffer structure in the first recess. A first Young's modulus of the buffer structure is less than a second Young's modulus of the substrate. The method includes forming a first wiring structure over the buffer structure and the substrate. The method includes bonding a chip package to the first wiring structure. The chip package has an interposer substrate and a chip structure over the interposer substrate, and a first corner of the interposer substrate and a second corner of the chip structure overlap the buffer structure in a top view of the chip package and the buffer structure.

Abstract: A non-spectral computed tomography scanner includes a radiation source configured to emit x-ray radiation, a detector array configured to detect x-ray radiation and generate non-spectral data, and a memory configured to store a spectral image module that includes computer executable instructions including a neural network trained to produce spectral volumetric image data. The neural network is trained with training spectral volumetric image data and training non-spectral data. The non-spectral computed tomography scanner further includes a processor configured to process the non-spectral data with the trained neural network to produce spectral volumetric image data.

Abstract: A vapor chamber structure includes a first flexible substrate, a second flexible substrate, a spacer, a flexible sealing member, and a working fluid. The first flexible substrate includes a first organic material layer, a first copper foil layer, and a first capillary structure layer. The second flexible substrate includes a second organic material layer, a second copper foil layer, and a second capillary structure layer. The first copper foil layer, the first capillary structure layer, the spacer, the second copper foil layer, and the second capillary structure layer are retracted by a distance relative to the first and second organic material layers to form a space. The first and second organic material layers and the flexible sealing member define a sealed chamber. The working fluid is disposed in the sealed chamber and located among the first and second capillary structure layers and grooves of the spacer.

Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.

Abstract: A drug delivery device including a main housing and a drug delivery module is provided. The main housing has an internal space. The drug delivery module is disposed in the internal space so as to be isolated from an external environment. The drug delivery module includes a drug bottle that contains a liquid drug and a driver that is connected to the drug bottle. The driver is configured to push the liquid drug to pass through a drug nebulization structure of the drug bottle such that the liquid drug is nebulized into a nebulized drug.

Abstract: A method of analyzing source code includes receiving, by a processor, an updated version of a computer program, the updated version including a source code. The method also includes preprocessing, by a compiler, the source code for a target computing platform. Preprocessing the source code by the compiler includes identifying a macro condition associated with one or more computer instructions enclosed by a macro, determining object code corresponding to the one or more computer instructions based on a current value of the macro condition, and generating object code and macro information for output to a debugger, the macro information including one or more breakpoint conditions in the macro.

Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.

Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.

Abstract: A display substrate, a display apparatus and a manufacturing method are provided. The display substrate includes: a base substrate; a first electrode layer on a side of the base substrate; a light-emitting layer on a side of the first electrode layer facing away from the base substrate including a plurality of light-emitting portions; a second electrode layer on a side of the light-emitting layer facing away from the first electrode layer; a first transparent inhibitor layer including a plurality of mutually separated first pattern portions; and an auxiliary electrode layer including an auxiliary electrode pattern formed by inhibition of the first pattern portions, where at least part of an orthographic projection of the auxiliary electrode pattern on the base substrate is separated from orthographic projections of the first pattern portions on the base substrate, and the auxiliary electrode pattern is in contact and electrically connected with the second electrode layer.

Abstract: The present disclosure relates to an integrated chip including a dielectric structure over a substrate. A first capacitor is disposed between sidewalls of the dielectric structure. The first capacitor includes a first electrode between the sidewalls of the dielectric structure and a second electrode between the sidewalls and over the first electrode. A second capacitor is disposed between the sidewalls. The second capacitor includes the second electrode and a third electrode between the sidewalls and over the second electrode. A third capacitor is disposed between the sidewalls. The third capacitor includes the third electrode and a fourth electrode between the sidewalls and over the third electrode. The first capacitor, the second capacitor, and the third capacitor are coupled in parallel by a first contact on a first side of the first capacitor and a second contact on a second side of the first capacitor.

Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.

Abstract: Systems and methods for deep neural network (DNN)-based cross component prediction are provided. A method includes inputting a reconstructed luma block of an image or video into a DNN; and predicting, by the DNN, a reconstructed chroma block of the image or video based on the reconstructed luma block that is input. Luma and chroma reference information and side information may also be input into the DNN to predict the reconstructed chroma block. The various inputs may also be generated using processes such as downsampling and transformation.

Abstract: The present invention discloses a shed tunnel structure for preventing a falling rock, including a shed tunnel body and a buffer plate for bearing impact of the falling rock, where the shed tunnel body includes a first supporting structure, and the first supporting structure is arranged on a side away from a ramp; one end of the buffer plate is connected to the ramp; a side face of the buffer plate close to the shed tunnel body is in movable contact with the first supporting structure, and the contact position is close to the other end of the buffer plate. The objective of resisting continuous impact of the falling rock can be achieved through the structural design.

Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.

Abstract: A notched filter includes a multilayer having alternating first and second polymer layers, the first polymer layers each including an isotropic polymer thin film having in-plane refractive indices n1x and n1y, and the second polymer layers each including an isotropic or anisotropic polymer thin film having in-plane refractive indices n2x and n2y, where a thickness of each successive first polymer layer decreases with increasing distance from a centerline of the multilayer, and a thickness of each successive second polymer layer increases with increasing distance from the centerline. Such a filter may be configured to reflect incident light having a desired polarization state within a predetermined and relatively narrow band.

Abstract: An image sensor structure including a substrate, a first pixel structure, a second pixel structure, a dielectric layer, and a conductive layer stack is provided. The first pixel structure includes a first light sensing device. The second pixel structure includes a second light sensing device. The conductive layer stack includes conductive layers. The conductive layer stack has a first opening and a second opening. The first opening is located directly above the first light sensing device and passes through the conductive layers. The second opening is located directly above the second light sensing device and passes through the conductive layers. The second minimum width of the second opening is smaller than the first minimum width of the first opening. The luminous flux of the second pixel structure is different from the luminous flux of the first pixel structure.