Patents by Inventor Sheng-chi Hsieh
Sheng-chi Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11777191Abstract: The present disclosure relates to a wireless communication module. The wireless communication module includes a first antenna layer and a second antenna layer non-coplanar with the second antenna layer. An electromagnetic wave of the first antenna and the second antenna are configured to have far-field interference to each other.Type: GrantFiled: December 23, 2020Date of Patent: October 3, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Yu Ho, Sheng-Chi Hsieh, Chih-Pin Hung
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Patent number: 11605877Abstract: A semiconductor device package includes a glass carrier, a package body, a first circuit layer and a first antenna layer. The glass carrier has a first surface and a second surface opposite to the first surface. The package body is disposed on the first surface of the glass carrier. The package body has an interconnection structure penetrating the package body. The first circuit layer is disposed on the package body. The first circuit layer has a redistribution layer (RDL) electrically connected to the interconnection structure of the package body. The first antenna layer is disposed on the second surface of the glass carrier.Type: GrantFiled: August 19, 2019Date of Patent: March 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Sheng-Chi Hsieh, Chen-Chao Wang, Teck-Chong Lee, Chien-Hua Chen
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Publication number: 20220200130Abstract: The present disclosure relates to a wireless communication module. The wireless communication module includes a first antenna layer and a second antenna layer non-coplanar with the second antenna layer. An electromagnetic wave of the first antenna and the second antenna are configured to have far-field interference to each other.Type: ApplicationFiled: December 23, 2020Publication date: June 23, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yu Ho, Sheng-Chi Hsieh, Chih-Pin Hung
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Patent number: 11201125Abstract: The present disclosure relates to a semiconductor package and a method of manufacturing the same. In some embodiments, a semiconductor package includes a substrate, at least one die, a sealing ring and an inductor. The at least one die is mounted on the substrate and includes a plurality of component structures operating with acoustic waves. The component structures are arranged on a side of the at least one die that faces the substrate. The sealing ring is disposed between the at least one die and the substrate and surrounds the component structures. The inductor is disposed in the substrate.Type: GrantFiled: February 24, 2017Date of Patent: December 14, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Sheng-Chi Hsieh, Hung-Yi Lin, Cheng-Yuan Kung, Pao-Nan Lee, Chien-Hua Chen
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Patent number: 10964652Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit layer, a first package body, a first antenna and an electronic component. The circuit layer has a first surface and a second surface opposite to the first surface. The first package body is disposed on the first surface of the circuit layer. The first antenna penetrates the first package body and is electrically connected to the circuit layer. The electronic component is disposed on the second surface of the circuit layer.Type: GrantFiled: April 18, 2019Date of Patent: March 30, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chien-Hua Chen, Sheng-Chi Hsieh
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Patent number: 10903561Abstract: A semiconductor device package includes a first glass carrier, a package body, a first circuit layer and a first antenna layer. The first circuit layer is disposed on the first surface of the first glass carrier. The first circuit layer has a redistribution layer (RDL). The package body is disposed on the first circuit layer. The package body has an interconnection structure penetrating the package body and is electrically connected to the RDL of the first circuit layer. The first antenna layer is disposed on the second surface of the first glass carrier.Type: GrantFiled: April 18, 2019Date of Patent: January 26, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chien-Hua Chen, Sheng-Chi Hsieh, Chen-Chao Wang, Teck-Chong Lee
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Publication number: 20200335458Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit layer, a first package body, a first antenna and an electronic component. The circuit layer has a first surface and a second surface opposite to the first surface. The first package body is disposed on the first surface of the circuit layer. The first antenna penetrates the first package body and is electrically connected to the circuit layer. The electronic component is disposed on the second surface of the circuit layer.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH
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Publication number: 20200335858Abstract: A semiconductor device package includes a first glass carrier, a package body, a first circuit layer and a first antenna layer. The first circuit layer is disposed on the first surface of the first glass carrier. The first circuit layer has a redistribution layer (RDL). The package body is disposed on the first circuit layer. The package body has an interconnection structure penetrating the package body and is electrically connected to the RDL of the first circuit layer. The first antenna layer is disposed on the second surface of the first glass carrier.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH, Chen-Chao WANG, Teck-Chong LEE
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Patent number: 10740813Abstract: In one aspect, this application describes a method for determining a version of a software application targeted for a computing device. The method includes receiving, at an application marketplace system and from a user associated with a computing device that operates remotely from the application marketplace system, a request that corresponds to a software application distributed by the application marketplace system, the software application having multiple versions on the application marketplace system. The method also includes determining one or more device attributes that are associated with the computing device, and identifying a particular version of the software application, from among the multiple versions on the application marketplace system, that is targeted for the computing device based on the device attributes. The method also includes providing, for display to the user and in response to the request, information related to the particular version of the software application.Type: GrantFiled: May 2, 2019Date of Patent: August 11, 2020Assignee: Google LLCInventors: Ilya Firman, Jasper S. Lin, Mark D. Womack, Yu-Kuan Lin, Sheng-chi Hsieh, Juliana Tsang
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Publication number: 20200083591Abstract: A semiconductor device package includes a glass carrier, a package body, a first circuit layer and a first antenna layer. The glass carrier has a first surface and a second surface opposite to the first surface. The package body is disposed on the first surface of the glass carrier. The package body has an interconnection structure penetrating the package body. The first circuit layer is disposed on the package body. The first circuit layer has a redistribution layer (RDL) electrically connected to the interconnection structure of the package body. The first antenna layer is disposed on the second surface of the glass carrier.Type: ApplicationFiled: August 19, 2019Publication date: March 12, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Sheng-Chi HSIEH, Chen-Chao WANG, Teck-Chong LEE, Chien-Hua CHEN
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Patent number: 10490341Abstract: An electrical device comprises a substrate, a first dielectric layer, a first die, an adjustable inductor and a second die. The substrate has a first surface. The first dielectric layer is disposed on the first surface of the substrate and has a first surface. The first die is surrounded by the first dielectric layer. The adjustable inductor is electrically connected to the first die. The adjustable inductor comprises a plurality of pillars surrounded by the first dielectric layer, a plurality of first metal strips disposed on the first surface of the first dielectric layer and electrically connected to the pillars, and a plurality of second metal strips disposed on the first surface of the first dielectric layer and electrically connected to the pillars. A width of at least one of the second metal strips is different than a width of at least one of the first metal strips. The second die is electrically connected to the adjustable inductor.Type: GrantFiled: August 17, 2017Date of Patent: November 26, 2019Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Teck-Chong Lee, Sheng-Chi Hsieh, Chien-Hua Chen
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Patent number: 10475734Abstract: A semiconductor device package includes: (1) a substrate having a first surface and a second surface opposite to the first surface; (2) a first patterned conductive layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first patterned conductive layer is adjacent to the substrate and opposite to the first surface of the first patterned conductive layer; (3) a first insulation layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first insulation layer is adjacent to the substrate and opposite to the first surface of the first insulation layer; and (4) a second patterned conductive layer extending from the first surface of the first insulation layer to the second surface of the substrate, the second patterned conductive layer electrically connected to the first patterned conductive layer.Type: GrantFiled: February 15, 2019Date of Patent: November 12, 2019Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chien-Hua Chen, Sheng-Chi Hsieh, Cheng-Yuan Kung
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Publication number: 20190259078Abstract: In one aspect, this application describes a method for determining a version of a software application targeted for a computing device. The method includes receiving, at an application marketplace system and from a user associated with a computing device that operates remotely from the application marketplace system, a request that corresponds to a software application distributed by the application marketplace system, the software application having multiple versions on the application marketplace system. The method also includes determining one or more device attributes that are associated with the computing device, and identifying a particular version of the software application, from among the multiple versions on the application marketplace system, that is targeted for the computing device based on the device attributes. The method also includes providing, for display to the user and in response to the request, information related to the particular version of the software application.Type: ApplicationFiled: May 2, 2019Publication date: August 22, 2019Inventors: Ilya Firman, Jasper S. Lin, Mark D. Womack, Yu-Kuan Lin, Sheng-chi Hsieh, Juliana Tsang
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Publication number: 20190181082Abstract: A semiconductor device package includes: (1) a substrate having a first surface and a second surface opposite to the first surface; (2) a first patterned conductive layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first patterned conductive layer is adjacent to the substrate and opposite to the first surface of the first patterned conductive layer; (3) a first insulation layer on the first surface of the substrate and having a first surface and a second surface, wherein the second surface of the first insulation layer is adjacent to the substrate and opposite to the first surface of the first insulation layer; and (4) a second patterned conductive layer extending from the first surface of the first insulation layer to the second surface of the substrate, the second patterned conductive layer electrically connected to the first patterned conductive layer.Type: ApplicationFiled: February 15, 2019Publication date: June 13, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH, Cheng-Yuan KUNG
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Patent number: 10290035Abstract: In one aspect, this application describes a method for determining a version of a software application targeted for a computing device. The method includes receiving, at an application marketplace system and from a user associated with a computing device that operates remotely from the application marketplace system, a request that corresponds to a software application distributed by the application marketplace system, the software application having multiple versions on the application marketplace system. The method also includes determining one or more device attributes that are associated with the computing device, and identifying a particular version of the software application, from among the multiple versions on the application marketplace system, that is targeted for the computing device based on the device attributes. The method also includes providing, for display to the user and in response to the request, information related to the particular version of the software application.Type: GrantFiled: January 27, 2017Date of Patent: May 14, 2019Assignee: Google LLCInventors: Ilya Firman, Jasper S. Lin, Mark D. Womack, Yu-Kuan Lin, Sheng-chi Hsieh, Juliana Tsang
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Publication number: 20190057809Abstract: An electrical device comprises a substrate, a first dielectric layer, a first die, an adjustable inductor and a second die. The substrate has a first surface. The first dielectric layer is disposed on the first surface of the substrate and has a first surface. The first die is surrounded by the first dielectric layer. The adjustable inductor is electrically connected to the first die. The adjustable inductor comprises a plurality of pillars surrounded by the first dielectric layer, a plurality of first metal strips disposed on the first surface of the first dielectric layer and electrically connected to the pillars, and a plurality of second metal strips disposed on the first surface of the first dielectric layer and electrically connected to the pillars. A width of at least one of the second metal strips is different than a width of at least one of the first metal strips. The second die is electrically connected to the adjustable inductor.Type: ApplicationFiled: August 17, 2017Publication date: February 21, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Yuan KUNG, Hung-Yi LIN, Teck-Chong LEE, Sheng-Chi HSIEH, Chien-Hua CHEN
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Patent number: 10211137Abstract: A method for manufacturing a semiconductor device package includes providing a substrate having a first surface and a second surface opposite to the first surface; disposing a passive component layer on the first surface of the substrate; after disposing the passive component layer, forming at least one via in the substrate, wherein the via penetrates the substrate and the passive component layer; and disposing a conductive layer on the passive component layer and filling the via with the conductive layer.Type: GrantFiled: June 8, 2017Date of Patent: February 19, 2019Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chien-Hua Chen, Sheng-Chi Hsieh, Cheng-Yuan Kung
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Publication number: 20180358291Abstract: A method for manufacturing a semiconductor device package includes providing a substrate having a first surface and a second surface opposite to the first surface; disposing a passive component layer on the first surface of the substrate; after disposing the passive component layer, forming at least one via in the substrate, wherein the via penetrates the substrate and the passive component layer; and disposing a conductive layer on the passive component layer and filling the via with the conductive layer.Type: ApplicationFiled: June 8, 2017Publication date: December 13, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Hua CHEN, Sheng-Chi HSIEH, Cheng-Yuan KUNG
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Publication number: 20180247904Abstract: The present disclosure relates to a semiconductor package and a method of manufacturing the same. In some embodiments, a semiconductor package includes a substrate, at least one die, a sealing ring and an inductor. The at least one die is mounted on the substrate and includes a plurality of component structures operating with acoustic waves. The component structures are arranged on a side of the at least one die that faces the substrate. The sealing ring is disposed between the at least one die and the substrate and surrounds the component structures. The inductor is disposed in the substrate.Type: ApplicationFiled: February 24, 2017Publication date: August 30, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Sheng-Chi HSIEH, Hung-Yi LIN, Cheng-Yuan KUNG, Pao-Nan LEE, Chien-Hua CHEN
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Patent number: 10014250Abstract: A semiconductor device includes a substrate and at least one inductor on the substrate. The inductor includes top portions separated from one another, bottom portions separated from one another, and side portions separated from one other. Each side portion extends between one of the top portions and one of the bottom portions. A semiconductor device includes a substrate, a first patterned conductive layer on the substrate, a second patterned conductive layer, and at least one dielectric layer between the first patterned conductive layer and the second patterned conductive layer. The first patterned conductive layer defines bottom crossbars separated from each other, each bottom crossbar including a bend angle. The second patterned conductive layer defines top crossbars separated from each other, wherein each top crossbar is electrically connected to a bottom crossbar.Type: GrantFiled: February 9, 2016Date of Patent: July 3, 2018Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Sheng-Chi Hsieh, Chih-Pin Hung