Patents by Inventor Sheng-Chieh Chang
Sheng-Chieh Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230260977Abstract: Various embodiments of a 3DIC die package, including trench capacitors integrated with IC dies, are disclosed. A 3DIC die package includes a first IC die and a second IC die disposed on the first IC die. The first IC die includes a substrate having a first surface and a second surface opposite to the first surface, a first active device disposed on the first surface of the substrate, and a passive device disposed on the second surface of the substrate. The passive device includes a plurality of trenches disposed in the substrate and through the second surface of the substrate, first and second conductive layers disposed in the plurality of trenches and on the second surface of the substrate, and a first dielectric layer disposed between the first and second conductive layers. The second IC die includes a second active device.Type: ApplicationFiled: October 7, 2022Publication date: August 17, 2023Applicant: MediaTek Inc.Inventors: Hsiao-Yun CHEN, Chi-Hung HUANG, Yao-Tsung HUANG, Cheng-Jyi CHANG, Sheng Chieh CHANG
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Patent number: 11424708Abstract: An estimation method for estimating a rotor frequency of a motor during freewheeling, includes: applying a fixed input voltage and one selected from a plurality of stator frequencies to the motor sequentially so as to perform frequency scanning; detecting a stator current value of the motor corresponding to the selected stator frequency; calculating a stator current slope of the stator current values sequentially; defining a target period from a start point where the stator current slope varies from positive to negative to an end point where the stator current slope varies from negative to positive; and determining that a difference between the scanned stator frequency and the rotor frequency is within a preset value, then designating any of the corresponding stator frequencies during the target period as an estimated value of the rotor frequency.Type: GrantFiled: June 14, 2021Date of Patent: August 23, 2022Assignee: DELTA ELECTRONICS, INC.Inventors: Shao-Kai Tseng, Yuan-Qi Hsu, Sheng-Han Wu, Sheng-Chieh Chang
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Publication number: 20210399665Abstract: An estimation method for estimating a rotor frequency of a motor during freewheeling, includes: applying a fixed input voltage and one selected from a plurality of stator frequencies to the motor sequentially so as to perform frequency scanning; detecting a stator current value of the motor corresponding to the selected stator frequency; calculating a stator current slope of the stator current values sequentially; defining a target period from a start point where the stator current slope varies from positive to negative to an end point where the stator current slope varies from negative to positive; and determining that a difference between the scanned stator frequency and the rotor frequency is within a preset value, then designating any of the corresponding stator frequencies during the target period as an estimated value of the rotor frequency.Type: ApplicationFiled: June 14, 2021Publication date: December 23, 2021Inventors: Shao-Kai TSENG, Yuan-Qi HSU, Sheng-Han WU, Sheng-Chieh CHANG
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Publication number: 20190181108Abstract: A semiconductor package structure includes a connection pad disposed on a semiconductor component. A protective layer includes a first non-conductive material, a first part, and a second part. The first part covers the semiconductor component except the connection pad, a surface of the first part is at a first height, the second part covers a periphery of the connection pad, a surface of the second part is at a second height, the first height is less than the second height, a middle part of the connection pad is exposed, and the first part and the second part are connected at an edge of the connection pad.Type: ApplicationFiled: February 19, 2019Publication date: June 13, 2019Inventors: Cheng Ting Chen, Sheng Chieh Chang, Yu Xia
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Publication number: 20140035507Abstract: The present invention discloses a motor deceleration method which is applied to a motor driving apparatus. The motor driving apparatus includes an energy-storing unit and a controlling unit, and outputs a driving signal to control the motor. The controlling unit controls a driving frequency of the driving signal. The driving deceleration method includes following steps of controlling the driving frequency to zero; increasing the driving frequency in a linear way by using the controlling unit; detecting whether a terminal voltage difference of the energy-storing unit is increased to a preset voltage value, and if yes, adjusting the driving signal to keep the terminal voltage difference at the preset voltage value; and reducing the driving frequency continuously to decelerate the motor.Type: ApplicationFiled: January 25, 2013Publication date: February 6, 2014Applicant: DELTA ELECTRONICS, INC.Inventors: Chien-Yu CHI, Chen-Hsiang KUO, Sheng-Chieh CHANG, Ting-Chung HSIEH, Shih-Chieh LIAO
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Patent number: 8191231Abstract: A method for manufacturing an antenna includes steps as follows. First, a substrate is provided, wherein a surface of the substrate has an antenna region. Then, the surface of the substrate is electroless plated with a metal medium, so that the surface is covered with the metal medium. Then, the metal medium is covered with a resist. Then, a portion of the resist in the antenna region is removed. Then, the antenna region is electroplated with metal material to form an antenna main body. Then, a remaining portion of the resist is removed, and excluding a portion of the metal medium in the antenna region, the other portion of the metal medium is also removed from the substrate.Type: GrantFiled: December 20, 2010Date of Patent: June 5, 2012Assignee: Wistron NeWeb CorporationInventors: Wen-Kuei Lo, Sheng-Chieh Chang, Bau-Yi Huang, Chi-Wen Tsai, Hsin-Hui Hsu, Tzuh-Suan Wang
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Patent number: 8176621Abstract: A method for forming an antenna structure is provided, including the following steps of: providing a non-conductive frame and disposing a plating resist material on the non-conductive frame, removing a part of the plating resist material within a predetermined region on the non-conductive frame and forming a roughened surface on the non-conductive frame within the predetermined region by laser marking, forming a medium layer on the roughened surface, wherein the medium layer comprises Pd or Ag, removing the plating resist material on the non-conductive frame, and forming a metal layer on the medium layer.Type: GrantFiled: December 15, 2010Date of Patent: May 15, 2012Assignee: Wistron NeWeb Corp.Inventors: Wen-Kuei Lo, Sheng-Chieh Chang, Bau-Yi Huang, Chi-Wen Tsai, Hsin-Hui Hsu, Tzuh-Suan Wang
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Publication number: 20120042505Abstract: A method for manufacturing an antenna includes steps as follows. First, a substrate is provided, wherein a surface of the substrate has an antenna region. Then, the surface of the substrate is electroless plated with a metal medium, so that the surface is covered with the metal medium. Then, the metal medium is covered with a resist. Then, a portion of the resist in the antenna region is removed. Then, the antenna region is electroplated with metal material to form an antenna main body. Then, a remaining portion of the resist is removed, and excluding a portion of the metal medium in the antenna region, the other portion of the metal medium is also removed from the substrate.Type: ApplicationFiled: December 20, 2010Publication date: February 23, 2012Applicant: WISTRON NEWEB CORPORATIONInventors: Wen-Kuei LO, Sheng-Chieh CHANG, Bau-Yi HUANG, Chi-Wen TSAI, Hsin-Hui HSU, Tzuh-Suan WANG
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Publication number: 20120027951Abstract: A method for forming an antenna structure is provided, including the following steps of: providing a non-conductive frame and forming a photosensitive medium layer on the non-conductive frame, wherein the medium layer comprises a catalyzer for electroless deposition; applying a light beam through a transparent portion of a mask to the medium layer, such that a part of the medium layer is solidified within a predetermined region on the non-conductive frame; removing a part of the medium layer outside of the predetermined region; and forming a metal layer on the medium layer within the predetermined region.Type: ApplicationFiled: January 26, 2011Publication date: February 2, 2012Applicant: WISTRON NEWEB CORP.Inventors: Sheng-Chieh Chang, Bau-Yi Huang, Chi-Wen Tsai, Hsin-Hui Hsu, Wen-Kuei Lo
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Publication number: 20120017427Abstract: A method for forming an antenna structure is provided, including the following steps of: providing a non-conductive frame and disposing a plating resist material on the non-conductive frame, removing a part of the plating resist material within a predetermined region on the non-conductive frame and forming a roughened surface on the non-conductive frame within the predetermined region by laser marking, forming a medium layer on the roughened surface, wherein the medium layer comprises Pd or Ag, removing the plating resist material on the non-conductive frame, and forming a metal layer on the medium layer.Type: ApplicationFiled: December 15, 2010Publication date: January 26, 2012Applicant: WISTRON NEWEB CORP.Inventors: Wen-Kuei Lo, Sheng-Chieh Chang, Bau-Yi Huang, Chi-Wen Tsai, Hsin-Hui Hsu, Tzuh-Suan Wang
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Patent number: 7630222Abstract: An inverter apparatus has an adaptable high-resolution voltage-to-frequency (V/f) control. The inverter apparatus receives an analog input signal and includes a first circuit, a second circuit, a third circuit, and a micro-controller unit. The first circuit processes a small-signal portion of the analog input signal with a larger voltage gain. The second and the third circuit both processes large-signal portions of the analog input signal with smaller voltage gains respectively. The three processed analog input signals of the first, the second, and the third circuits are converted into three digital output values respectively. The largest digital output value is selected by the micro-controller unit and supplied to a frequency operation unit for generating a corresponding output frequency.Type: GrantFiled: March 25, 2008Date of Patent: December 8, 2009Assignee: Delta Electronics, Inc.Inventors: Ting-Chung Hsieh, Cheng-Yen Lin, Sheng-Chieh Chang, Min-Jon Lee
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Publication number: 20090244935Abstract: An inverter apparatus has an adaptable high-resolution voltage-to-frequency (V/f) control. The inverter apparatus receives an analog input signal and includes a first circuit, a second circuit, a third circuit, and a micro-controller unit. The first circuit processes a small-signal portion of the analog input signal with a larger voltage gain. The second and the third circuit both processes large-signal portions of the analog input signal with smaller voltage gains respectively. The three processed analog input signals of the first, the second, and the third circuits are converted into three digital output values respectively. The largest digital output value is selected by the micro-controller unit and supplied to a frequency operation unit for generating a corresponding output frequency.Type: ApplicationFiled: March 25, 2008Publication date: October 1, 2009Inventors: Ting-Chung HSIEH, Cheng-Yen Lin, Sheng-Chieh Chang, Min-Jon Lee
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Patent number: D1026916Type: GrantFiled: January 5, 2022Date of Patent: May 14, 2024Assignee: COMPAL ELECTRONICS, INC.Inventors: Hao-Jen Fang, Kung-Ju Chen, Wei-Yi Chang, Chun-Chieh Chen, Chih-Wen Chiang, Sheng-Hung Lee