Patents by Inventor Sheng-Chih WANG

Sheng-Chih WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240107414
    Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
  • Publication number: 20240105480
    Abstract: A wafer storage elevator and method for detecting wafer position shift. The elevator includes a first storage elevator sidewall, a second storage elevator sidewall, and a storage seat positioned between the first and second storage elevator sidewalls. A first mirror block is coupled to a front side of the storage seat having a mirror positioned on a top surface of the block, and a second mirror block is coupled to the front side of the storage seat having a mirror that is positioned on the top surface of the second mirror block. The mirror of the first mirror block reflects a laser beam from an emission sensor to the second mirror block, and the mirror of the second mirror block reflects the laser beam from the mirror of the first mirror block to a receive sensor. A wafer misalignment is determined based upon an output of the receive sensor.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 28, 2024
    Inventors: Ming-Sze Chen, Yuan-Hsin Chi, Hung-Chih Wang, Sheng-Yuan Lin
  • Publication number: 20240048965
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive, from a network node, a network assistant information (NAI) message identifying a set of characteristics of a network connection. The UE may communicate with the network node using a communication configuration associated with the set of characteristics of the network connection. Numerous other aspects are described.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 8, 2024
    Inventors: Kai-Chun CHENG, Jen-Chun CHANG, Kuhn-Chang LIN, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yu-Chieh HUANG, Chun-Hsiang CHIU, ChihHung HSIEH, Chung Wei LIN, Yeong Leong CHOO
  • Publication number: 20240038741
    Abstract: A package structure includes a package substrate, a first die, a second die, a first underfill, and a second underfill. The first die and a second die are disposed on the package substrate. The first underfill is between the first die and the package substrate, and the first underfill includes a first extension portion extending from a first sidewall of the first die toward the second die. The second underfill is between the second die and the package substrate, and the second underfill includes a second extension portion extending from a second sidewall of the second die toward the first die, the second extension portion overlapping the first extension portion on the package substrate.
    Type: Application
    Filed: October 6, 2023
    Publication date: February 1, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Yuan CHANG, Sheng-Chih WANG
  • Patent number: 11837586
    Abstract: A package structure includes a package substrate, a first die, a second die, a first underfill, and a second underfill. The first die and a second die are disposed on the package substrate. The first underfill is between the first die and the package substrate, and the first underfill includes a first extension portion extending from a first sidewall of the first die toward the second die. The second underfill is between the second die and the package substrate, and the second underfill includes a second extension portion extending from a second sidewall of the second die toward the first die, the second extension portion overlapping the first extension portion on the package substrate.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: December 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Yuan Chang, Sheng-Chih Wang
  • Publication number: 20220278083
    Abstract: A package structure includes a package substrate, a first die, a second die, a first underfill, and a second underfill. The first die and a second die are disposed on the package substrate. The first underfill is between the first die and the package substrate, and the first underfill includes a first extension portion extending from a first sidewall of the first die toward the second die. The second underfill is between the second die and the package substrate, and the second underfill includes a second extension portion extending from a second sidewall of the second die toward the first die, the second extension portion overlapping the first extension portion on the package substrate.
    Type: Application
    Filed: June 17, 2021
    Publication date: September 1, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jen-Yuan CHANG, Sheng-Chih WANG
  • Patent number: 10930701
    Abstract: A light-emitting device includes a first semiconductor layer having an uppermost surface and a bottommost surface; a first light-emitting structure and a second light-emitting structure formed on the same first semiconductor layer, wherein the first semiconductor layer is continuous; a first trench formed between the first and the second light-emitting structures; and a second electrode formed on the second semiconductor layer and including a second pad and a plurality of second extending parts extending from the second pad; wherein the second pad is between the first and the second light-emitting structures, and the plurality of second extending parts extends to the first and the second light-emitting structures, respectively; wherein the first trench passes through the uppermost surface but does not extend to the bottommost surface; wherein the first trench includes an equal width in a top view.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: February 23, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Chun-Wei Chang, Chih-Wei Wu, Sheng-Chih Wang, Hsin-Mei Tsai, Chia-Chen Tsai, Chuan-Cheng Chang
  • Publication number: 20190252459
    Abstract: A light-emitting device includes a first semiconductor layer having an uppermost surface and a bottommost surface; a first light-emitting structure and a second light-emitting structure formed on the same first semiconductor layer, wherein the first semiconductor layer is continuous; a first trench formed between the first and the second light-emitting structures; and a second electrode formed on the second semiconductor layer and including a second pad and a plurality of second extending parts extending from the second pad; wherein the second pad is between the first and the second light-emitting structures, and the plurality of second extending parts extends to the first and the second light-emitting structures, respectively; wherein the first trench passes through the uppermost surface but does not extend to the bottommost surface; wherein the first trench includes an equal width in a top view.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Inventors: Chen OU, Chun-Wei CHANG, Chih-Wei WU, Sheng-Chih WANG, Hsin-Mei TSAI, Chia-Chen TSAI, Chuan-Cheng CHANG
  • Patent number: 10319780
    Abstract: A light-emitting device includes a first semiconductor layer; a first, a second and a third light-emitting structures formed on the same first semiconductor layer; a first trench between the first and the second light-emitting structures; a second trench between the second and the third light-emitting structures, wherein the first and the second trenches include bottom portions exposing a surface of the first semiconductor layer; a third trench in one of the light-emitting structures, exposing the first semiconductor layer and extending along a direction parallel with the first semiconductor layer; an insulating bridge part in the first and the second trenches, connecting the light-emitting structures; a first electrode in the third trench, electrically connecting to the first semiconductor layer; and a second electrode, including a pad on one of the light-emitting structures and an extending part; wherein the extending part is formed on the insulating bridge part and extends to the light-emitting structures.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: June 11, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Chun-Wei Chang, Chih-Wei Wu, Sheng-Chih Wang, Hsin-Mei Tsai, Chia-Chen Tsai, Chuan-Cheng Chang
  • Publication number: 20170365637
    Abstract: A light-emitting device includes a first semiconductor layer; a first, a second and a third light-emitting structures formed on the same first semiconductor layer; a first trench between the first and the second light-emitting structures; a second trench between the second and the third light-emitting structures, wherein the first and the second trenches include bottom portions exposing a surface of the first semiconductor layer; a third trench in one of the light-emitting structures, exposing the first semiconductor layer and extending along a direction parallel with the first semiconductor layer; an insulating bridge part in the first and the second trenches, connecting the light-emitting structures; a first electrode in the third trench, electrically connecting to the first semiconductor layer; and a second electrode, including a pad on one of the light-emitting structures and an extending part; wherein the extending part is formed on the insulating bridge part and extends to the light-emitting structures.
    Type: Application
    Filed: August 11, 2017
    Publication date: December 21, 2017
    Inventors: Chen OU, Chun-Wei CHANG, Chih-Wei WU, Sheng-Chih WANG, Hsin-Mei TSAI, Chia-Chen TSAI, Chuan-Cheng CHANG
  • Patent number: 9768227
    Abstract: A light-emitting element comprises a first semiconductor layer, a first light-emitting structure and a second light-emitting structure on the first semiconductor layer, a first electrode on the first semiconductor layer, a second electrode on the first light-emitting structure, a first trench between the first light-emitting structure and the second light-emitting structure, exposing a first upper surface of the first semiconductor layer, and a second trench formed in the first light-emitting structure, exposing a second upper surface of the first semiconductor layer, wherein the first trench is devoid of the first electrode and the second electrode formed therein, wherein the first electrode is formed in the second trench.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: September 19, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Chun-Wei Chang, Chih-Wei Wu, Sheng-Chih Wang, Hsin-Mei Tsai, Chia-Chen Tsai, Chuan-Cheng Chang
  • Publication number: 20150076536
    Abstract: A light-emitting element comprises a first semiconductor layer, a first light-emitting structure and a second light-emitting structure on the first semiconductor layer, a first electrode on the first semiconductor layer, a second electrode on the first light-emitting structure, and a first trench between the first light-emitting structure and the second light-emitting structure, exposing the first semiconductor layer, wherein the first trench is devoid of the first electrode and the second electrode formed therein.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 19, 2015
    Inventors: Chen OU, Chun-Wei CHANG, Chih-Wei WU, Sheng-Chih WANG, Hsin-Mei TSAI, Chia-Chen TSAI, Chuan-Cheng CHANG