Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: A semiconductor device includes a first fin, a first continuous fin and continuous gates. The first fin is formed on a substrate, and includes first and second portions that are spaced apart by a first recess. A side of the first portion and a side of the second portion are located at two sides of the first recess, respectively. The first continuous fin is formed on the substrate, and extends along the first portion, the first recess and the second portion. The continuous gates are formed on the substrate, and arranged to intersect the first continuous fin and the first fin in a layout view. A first number of the continuous gates are disposed across the first recess and each of the first number of the continuous gates is disposed between the two sides of the first recess in a layout view. A method is also disclosed herein.

Abstract: A method includes the operations below. A first and second layout patterns corresponding to a first and second area are placed. Third layout patterns corresponding to a first continuous fin over the first area and second area, and corresponding to a second fin including separate portions spaced apart by a first recess over the first area are placed. A fourth layout pattern, corresponding to a dummy gate, at the recess portion and between the first layout pattern and the second layout pattern, is placed to generate a layout design of a semiconductor device. A side of the second area facing the first recess is substantially flat, and the semiconductor device is fabricated by a tool based on the layout design. A first length of the first continuous fin is equal to a sum of a second length of the second fin and a third length of the first recess.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: A method includes the operations below. A first and second layout patterns corresponding to a first and second area are placed. Third layout patterns corresponding to a first continuous fin over the first area and second area, and corresponding to a second fin including separate portions spaced apart by a first recess over the first area are placed. A fourth layout pattern, corresponding to a dummy gate, at the recess portion and between the first layout pattern and the second layout pattern, is placed to generate a layout design of a semiconductor device. A side of the second area facing the first recess is substantially flat, and the semiconductor device is fabricated by a tool based on the layout design. A first length of the first continuous fin is equal to a sum of a second length of the second fin and a third length of the first recess.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: A semiconductor device includes a substrate and fins. The fins are formed on a first area and a second area of the substrate. The first area includes a first recess. The second area is located with respect to the first area. The first recess is disposed at a side of the first area, and faces the second area. A projection area of the first recess on a side of the second area is substantially flat.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: A semiconductor device includes a substrate and fins. The fins are formed on a first area and a second area of the substrate. The first area includes a first recess. The second area is located with respect to the first area. The first recess is disposed at a side of the first area, and faces the second area. A projection area of the first recess on a side of the second area is substantially flat.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided. A semiconductor arrangement comprises a first guard ring surrounding at least a portion of a device, and a first poly layer formed over the first guard ring.

Abstract: A device includes a metal-oxide-semiconductor (MOS) device, which includes a gate electrode and a source/drain region adjacent the gate electrode. A first and a second contact plug are formed directly over and electrically connected to two portions of a same MOS component, wherein the same MOS component is one of the gate electrode and the source/drain region. The same MOS component is configured to be used as a resistor that is connected between the first and the second contact plugs.

Abstract: A telephoto zoom lens include a first, a second, a third and a fourth lens groups sequentially arranged along an optical axis and from an object side to an image side. The refractive powers of the four lens groups are positive, negative, positive and positive, respectively. The first lens group is fixed at a first predetermined position. The second lens group is movable along the optical axis depending on the variation of the magnifying power of the zoom lens. The third lens group is fixed at a second predetermined position. The fourth lens group is movable along the optical axis to keep an image plane generated by the zoom lens to project accurately onto an image sensor. Hence, the first and the third lens groups are in resting state, and the second and the fourth lens groups are movable during zoom-in or zoom-out operation of the zoom lens.

Abstract: A device includes a metal-oxide-semiconductor (MOS) device, which includes a gate electrode and a source/drain region adjacent the gate electrode. A first and a second contact plug are formed directly over and electrically connected to two portions of a same MOS component, wherein the same MOS component is one of the gate electrode and the source/drain region. The same MOS component is configured to be used as a resistor that is connected between the first and the second contact plugs.

Abstract: A miniature zoom lens includes a first, a second and a third lens groups arranged along an optical axis and from an object side to an image side in sequence. The refractive powers of the three lens groups are negative, positive and positive, respectively. The first lens group is fixed at a predetermined position. The second lens group is movable along the optical axis in accordance with a change of magnification. The third lens group is movable along the optical axis for keeping an image plane fixed at an image sensor. The first lens group is in resting state and the second and the third lens groups are movable during zoom-in or zoom-out operation of the miniature zoom lens. In addition, the miniature zoom lens can be composed of at least seven pieces of lens, thus the cost is reduced, the manufacture is easy and the assembly is simple.

Abstract: A miniature zoom lens includes a first, a second and a third lens groups arranged along an optical axis and from an object side to an image side in sequence. The refractive powers of the three lens groups are negative, positive and positive, respectively. The first lens group is fixed at a predetermined position. The second lens group is movable along the optical axis in accordance with a change of magnification. The third lens group is movable along the optical axis for keeping an image plane fixed at an image sensor. The first lens group is in resting state and the second and the third lens groups are movable during zoom-in or zoom-out operation of the miniature zoom lens. In addition, the miniature zoom lens can be composed of at least seven pieces of lens, thus the cost is reduced, the manufacture is easy and the assembly is simple.