Patents by Inventor Sheng HUI
Sheng HUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240168935Abstract: Access usage of one or more shards of a set of shards of a database is determined. The set of shards includes a plurality of shards including a primary shard and one or more replica shards of the primary shard. A shard of the plurality of shards is selected based on the access usage, and a set of indexes is built for the shard that is selected. The set of indexes built for the shard that is selected is used for at least multiple shards of the plurality of shards.Type: ApplicationFiled: November 21, 2022Publication date: May 23, 2024Inventors: Peng Hui JIANG, Sheng Yan SUN, Xiao Xiao CHEN, Ying ZHANG, Xiao Yi TIAN
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Publication number: 20240167185Abstract: A composite metal foil and a method of manufacturing the same are provided. The composite metal foil includes at least a first metal layer and a second metal layer. The first metal layer is copper foil, nickel foil, stainless steel foil, or a combination thereof. The second metal layer is disposed on a surface of the first metal layer. A contact angle of a surface of the second metal layer to liquid lithium metal is lower than 90 degrees.Type: ApplicationFiled: January 18, 2023Publication date: May 23, 2024Applicant: Industrial Technology Research InstituteInventors: Chiu-Yen Chiu, Li-Ju Chen, Sheng-Hui Wu, Chia-Chen Fang
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Patent number: 11983090Abstract: A method of analyzing source code includes receiving, by a processor, an updated version of a computer program, the updated version including a source code. The method also includes preprocessing, by a compiler, the source code for a target computing platform. Preprocessing the source code by the compiler includes identifying a macro condition associated with one or more computer instructions enclosed by a macro, determining object code corresponding to the one or more computer instructions based on a current value of the macro condition, and generating object code and macro information for output to a debugger, the macro information including one or more breakpoint conditions in the macro.Type: GrantFiled: February 17, 2022Date of Patent: May 14, 2024Assignee: International Business Machines CorporationInventors: Xiao Ling Chen, Wen Ji Huang, Heng Wang, Sheng Shuang Li, Wen Bin Han, Peng Hui Jiang
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Publication number: 20240134853Abstract: A computer-implemented method dynamically switches access plans for a query during concurrent query execution. The method includes receiving a first query configured to be processed by a database system. The method also includes generating, for the first query, an access plan for each of identified resource sets. The method includes determining a first set of available resources that represent an available capacity for the database system. The method further includes selecting a first resource set of the one or more resource sets, where the selecting is based on the first set of available resources being closest to the first resource set. The method also includes selecting, based on the first set of available resources, a first access plan of the one or more access plans. The method includes executing the first query and returning results of the first query to a source of the first query.Type: ApplicationFiled: October 18, 2022Publication date: April 25, 2024Inventors: Xiao Xiao Chen, Sheng Yan Sun, Peng Hui Jiang, YING ZHANG
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Patent number: 11947561Abstract: An embodiment for analyzing and tracking data flow to determine proper schemas for unstructured data. The embodiment may automatically use a sidecar to collect schema discovery rules during conversion of raw data to unstructured data. The embodiment may automatically generate multiple schemas for different tenants using the collected schema discovery rules. The embodiment may automatically use ETL to export unstructured data to SQL databases with the generated multiple schemas for the different tenants. The embodiment may automatically monitor usage data of the SQL databases and collect the usage data. The embodiment may automatically optimize schema discovery using the collected usage data. The embodiment may automatically discover schemas with hot usage and apply the discovered schemas with hot usage to other tenants for consumption and further monitoring.Type: GrantFiled: June 21, 2022Date of Patent: April 2, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peng Hui Jiang, Jun Su, Sheng Yan Sun, Hong Mei Zhang, Meng Wan
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Publication number: 20240103896Abstract: A computer-implemented method, system and computer program product for scaling a resource of a Database as a Service (DBaaS) cluster in a cloud platform. User service requests from a service cluster to be processed by the DBaaS cluster are received. A first set of tracing data is generated by a service mesh, which facilitates service-to-service communication between the service cluster and the DBaaS cluster, from the user service requests. A second set of tracing data is generated by the DBaaS cluster from handling the user service requests. A dependency tree is then generated to discover application relationships to identify potential bottlenecks in nodes of the DBaaS cluster based on these sets of tracing data. The pod(s) of a DBaaS node are then scaled based on the dependency tree, which is used in part, to predict the utilization of the resources of the DBaaS node identified as being a potential bottleneck.Type: ApplicationFiled: September 24, 2022Publication date: March 28, 2024Inventors: Peng Hui Jiang, Yue Wang, Jun Su, Su Liu, Sheng Yan Sun
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Patent number: 11940975Abstract: A computer-implemented method that includes receiving an ingestion request to ingest data to a database comprising physical shards and detecting that the ingestion request is directed to a first hotspot shard. The first hotspot shard has a contention level over a threshold value. The method also detects context characteristics within the data and generates a first virtual shard based on a first virtual shard key selected from the detected context characteristics. The first virtual shard virtually duplicates at least a portion of the first hotspot shard. The method also includes ingesting the data to the first virtual shard.Type: GrantFiled: September 28, 2020Date of Patent: March 26, 2024Assignee: International Business Machines CorporationInventors: Shuo Li, Peng Hui Jiang, Xiaobo Wang, Sheng Yan Sun
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Patent number: 11934359Abstract: A method, computer system, and a computer program product is provided for computer log management. In one embodiment, in response to receiving a log request from a user, an input content is analyzed and adjusted according to input contents and user's previous activities. A similarity analysis and a fairness analysis is performed to determine similarities between the input content, as adjusted, and a plurality of log records in an object library. The similarity analysis includes analyzing any patterns and attributes. The attributes have a dimension, and each dimension has a predefined weight (W). The fairness analysis ensures that one type of log is not favored over others. A best possible match is then determined, and one or more logs are presented to the user providing the best possible match.Type: GrantFiled: November 18, 2022Date of Patent: March 19, 2024Assignee: International Business Machines CorporationInventors: Sheng Yan Sun, Peng Hui Jiang, Meng Wan, Hong Mei Zhang
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Publication number: 20240086306Abstract: One or more computer processors generate a debug chain from one or more similar resource bound breakpoints, wherein the debug chain provides dynamic code flow. The one or more computer processors distribute the generated debug chain to one or more tenants.Type: ApplicationFiled: September 13, 2022Publication date: March 14, 2024Inventors: Peng Hui Jiang, Jun Su, Sheng Yan Sun, Hong Mei Zhang, Meng Wan
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Publication number: 20240079268Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
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Publication number: 20240070911Abstract: A tracking device includes a camera and a processor is disclosed. The camera is configured to capture several first pictures with a first setting group and several second pictures with a second setting group in turn. The processor is coupled to the camera. The processor is configured to select a current time point picture from several first pictures or several second pictures according to a current time point speed of the tracking device of the current time point, and to determine a current pose of the tracking device of the current time point according to the current time point picture.Type: ApplicationFiled: July 3, 2023Publication date: February 29, 2024Inventors: Chun-Kai HUANG, Sheng-Hui TAO
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Patent number: 11914594Abstract: A disclosed database system and enhanced methods implement enhanced mini-plans and dynamically changing a query mini-plan with trustworthy Artificial Intelligence (AI) to improve query execution performance in a database system. An AI cost model evaluates candidate mini-plans for executing a query. AI truth monitors evaluate the execution of the mini-plans, such as predicted input factors and adjusted mini-plans of one or more AI running data models. The AI truth monitors provide feedback to adjust the AI cost model based on evaluating the execution of the mini-plans. The AI truth monitors validate adjusted mini-plans, provide feedback to the AI cost model with improved overall prediction accuracy, and enhanced mini-plans to gain query performance.Type: GrantFiled: December 28, 2022Date of Patent: February 27, 2024Assignee: International Business Machines CorporationInventors: Hong Mei Zhang, Meng Wan, Sheng Yan Sun, Peng Hui Jiang
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Patent number: 11914586Abstract: An embodiment includes generating a partition schema for a distributed database based on historical usage data indicative of usage of the distributed database, where the generating of the partition schema comprises determining a partition range of a partition of the partition schema. The embodiment also includes generating a node identifier for the partition using a hash function and a first weight value assigned to the partition. The embodiment also includes monitoring performance data indicative of a performance of the distributed database, the monitoring comprising detecting a failure of the performance to satisfy a performance threshold. The embodiment also includes initiating, responsive to detecting the failure, a redistribution procedure by changing the node identifier of the partition by replacing the first weight value with a second weight value.Type: GrantFiled: March 31, 2022Date of Patent: February 27, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hong Mei Zhang, Sheng Yan Sun, Meng Wan, Peng Hui Jiang
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Patent number: 11915977Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.Type: GrantFiled: April 12, 2021Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih Pei Chou, Chia-Chieh Lin
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Publication number: 20240005553Abstract: The embodiments of the disclosure provide a method for pose correction and a host. The method includes: obtaining a first image; in response to determining that a first reference object of at least one reference object exists in the first image, determining a first relative position between the host and the first reference object; obtaining a first reference pose based on the first relative position; and correcting a pose of the host based on the first reference pose.Type: ApplicationFiled: May 26, 2022Publication date: January 4, 2024Applicant: HTC CorporationInventors: Yun-Ting Wang, Sheng-Hui Tao
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Publication number: 20230402292Abstract: A method of manufacturing an electronic device includes providing a substrate, providing an intermediate layer on the substrate, and providing an isolation layer on the intermediate layer. The substrate includes an active region and a peripheral region. The peripheral region is adjacent to the active region, and the ratio of the area of the active region to the area of the substrate surface is between 75% and 92%. The isolation layer includes a first surface and at least one slope. The first surface of the isolation layer is correspondingly disposed in the active region. The at least one slope of the isolation layer is correspondingly disposed in the peripheral region and at a first angle with respect to the substrate surface.Type: ApplicationFiled: June 27, 2022Publication date: December 14, 2023Applicant: InnoLux CorporationInventors: Chuan-Ming YEH, Heng-Shen YEH, Sheng-Hui CHIU, Kuo-Jung FAN
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Patent number: 11832441Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a fin positioned on the substrate, a gate structure positioned on the fin, a pair of source/drain regions positioned on two sides of the fin, a dielectric layer positioned above the drain region and adjacent to the gate structure, and a storage conductive layer positioned on the dielectric layer. The drain region, the dielectric layer and the storage conductive layer form a storage structure.Type: GrantFiled: November 23, 2021Date of Patent: November 28, 2023Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Sheng-Hui Yang
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Publication number: 20230352433Abstract: A semiconductor device structure includes a silicon layer disposed over a first semiconductor die, and a first mask layer disposed over the silicon layer. The semiconductor device structure also includes a second semiconductor die disposed over the first mask layer, and a through silicon via penetrating through the silicon layer and the first mask layer. A bottom surface of the through silicon via is greater than a top surface of the through silicon via, and the top surface of the through silicon via is greater than a cross-section of the through silicon via between and parallel to the top surface and the bottom surface of the through silicon via.Type: ApplicationFiled: April 27, 2022Publication date: November 2, 2023Inventor: SHENG-HUI YANG
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Publication number: 20230352434Abstract: A semiconductor device structure includes a silicon layer disposed over a first semiconductor die, and a first mask layer disposed over the silicon layer. The semiconductor device structure also includes a second semiconductor die disposed over the first mask layer, and a through silicon via penetrating through the silicon layer and the first mask layer. A bottom surface of the through silicon via is greater than a top surface of the through silicon via, and the top surface of the through silicon via is greater than a cross-section of the through silicon via between and parallel to the top surface and the bottom surface of the through silicon via.Type: ApplicationFiled: July 3, 2023Publication date: November 2, 2023Inventor: SHENG-HUI YANG
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Publication number: 20230261082Abstract: A contact structure and a manufacturing method are provided. The contact structure includes a recessed structure, a conductive feature, a first functional layer, a second functional layer and an interfacial layer. The conductive feature is filled in a recess of the recessed structure. The first functional layer extends between the conductive feature and the recessed structure. The second functional layer extends between the first functional layer and the conductive feature. The interfacial extends along an interface between the first and second functional layers, and includes a first element from the first functional layer and a second element from the second functional layer.Type: ApplicationFiled: February 14, 2022Publication date: August 17, 2023Inventor: SHENG-HUI YANG