Patents by Inventor Sheng Yang Chen
Sheng Yang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984431Abstract: A structure and a method of forming are provided. The structure includes a first dielectric layer overlying a first substrate. A first connection pad is disposed in a top surface of the first dielectric layer and contacts a first redistribution line. A first dummy pad is disposed in the top surface of the first dielectric layer, the first dummy pad contacting the first redistribution line. A second dielectric layer overlies a second substrate. A second connection pad and a second dummy pad are disposed in the top surface of the second dielectric layer, the second connection pad bonded to the first connection pad, and the first dummy pad positioned in a manner that is offset from the second dummy pad so that the first dummy pad and the second dummy pad do not contact each other.Type: GrantFiled: January 19, 2023Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuo-Ming Wu, Yung-Lung Lin, Zhi-Yang Wang, Sheng-Chau Chen, Cheng-Hsien Chou
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Publication number: 20240144708Abstract: An examination system is provided. The examination system includes an optical detector and analyzer. The optical detector emits a detection light source toward a target object and detects a respondent light which is induced from the target object in response to the detection light source to generate image data. The image data indicates a detection image. The analyzer receives the image data and determines which region of the target object the detection image belongs to according to the image data. When the analyzer determines that the detection image belongs to a specific region of the target object, the analyzer extracts at least one feature of the image data to serve as a basis for classification of the specific region.Type: ApplicationFiled: January 4, 2024Publication date: May 2, 2024Inventors: Chih-Yang CHEN, Pau-Choo CHUNG CHAN, Sheng-Hao TSENG
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Publication number: 20240120388Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.Type: ApplicationFiled: January 18, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Jih-Sheng Yang, Shih-Chieh Chao, Chia Ming Liang, Yih-Ann Lin, Ryan Chia-Jen Chen
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Publication number: 20240113032Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.Type: ApplicationFiled: April 25, 2023Publication date: April 4, 2024Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, Cheyu LIU, Hung-Chih CHEN, Yi-Yang LEI, Ching-Hua HSIEH
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Publication number: 20240105795Abstract: A method for fabricating semiconductor devices is disclosed. The method includes forming a gate trench over a semiconductor channel, the gate trench being surrounded by gate spacers. The method includes sequentially depositing a work function metal, a glue metal, and an electrode metal in the gate trench. The method includes etching respective portions of the electrode metal and the glue metal to form a gate electrode above a metal gate structure. The metal gate structure includes a remaining portion of the work function metal and the gate electrode includes a remaining portion of the electrode metal. The gate electrode has an upper surface extending away from a top surface of the metal gate structure.Type: ApplicationFiled: February 16, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jun-Ye Liu, Jih-Sheng Yang, Yu-Hsien Lin, Ryan Chia-Jen Chen
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Publication number: 20240096630Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.Type: ApplicationFiled: January 12, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Jih-Sheng Yang, Shih-Chieh Chao, Yih-Ann Lin, Ryan Chia-Jen Chen
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Publication number: 20240085634Abstract: An optical fiber transmission device includes a substrate, a photonic integrated circuit, and an optical fiber assembly. The photonic integrated circuit is disposed on an area of the substrate. The substrate has a protruding structure at an interface with an edge of the photonic integrated circuit. The optical fiber assembly includes an optical fiber and a ferrule that sleeves the optical fiber. The protruding structure of the substrate is configured to abut against the ferrule to limit the position of the optical fiber assembly in a vertical direction of the substrate, such that the protruding structure is a stopper for the optical fiber assembly in the vertical direction.Type: ApplicationFiled: September 14, 2023Publication date: March 14, 2024Applicant: AuthenX Inc.Inventors: Chun-Chiang YEN, Po-Kuan SHEN, Sheng-Fu LIN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
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Publication number: 20240089000Abstract: An optical fiber network device includes a fiber and a photonic integrated circuit. Fiber receives a first optical signal and transmits a second optical signal. A first wavelength of first optical signal is different from a second wavelength of second optical signal. Photonic integrated circuit includes a laser chip, a photodetector, a wavelength division multiplexing coupler, a first optical modulation element and a second optical modulation element. Laser chip is disposed on photonic integrated circuit, and is configured to generate first optical signal. Photodetector detects second optical signal. Wavelength division multiplexing coupler is configured to couple first optical signal to fiber, and receives second optical signal. First optical modulation element is coupled to wavelength division multiplexing coupler and laser chip, and is configured to modulate first optical signal.Type: ApplicationFiled: September 14, 2023Publication date: March 14, 2024Applicant: AuthenX Inc.Inventors: Sheng-Fu LIN, Po-Kuan SHEN, Chun-Chiang YEN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
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Publication number: 20240071722Abstract: Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Inventors: Sheng-Liang Pan, Bing-Hung Chen, Chia-Yang Hung, Jyu-Horng Shieh, Shu-Huei Suen, Syun-Ming Jang, Jack Kuo-Ping Kuo
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Patent number: 11913597Abstract: A product-display system for displaying and securing a retail product. The system may include a retainer having a retainer bracket and a retainer body coupled to the retainer bracket. A retaining cable may be coupled to the retainer body at an opening in the retainer body. A fastener that may be unfastened to release the product from the retainer may only be accessed through the opening of the retainer body such that when the retaining cable is coupled to the opening, no fasteners of the retainer may be visible or accessible. The system may also include a display stem for holding the retainer and product. The display stem may include a recess for receiving at least a portion of the retainer body. The retaining cable may extend through the display stem and may simultaneously transmit power and data to a displayed product. The retainer may be returned to and held on top of the display stem using a retaining cable.Type: GrantFiled: December 1, 2021Date of Patent: February 27, 2024Assignee: Apple Inc.Inventors: Sheng Yang, Eric W. Wang, Steven C. Michalske, Olivia Ching, Clayton R. Woosley, Samuel Wing Man Yuen, Paul Joseph Hack, Ricardo A Mariano, Chien Tsun Chen, George Tziviskos, Charles A. Schwalbach
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Patent number: 9586138Abstract: A sensing apparatus may be provided capable of detecting a hit by a projectile, such as a BB pellet. The sensing apparatus may include a surface and accelerometer to detect the acceleration of the surface. A processor may determine whether a projectile hit has occurred. The sensing apparatus may be mounted onto a vehicle. The vehicle may be a robot capable of participating in a game. The robot game may occur within a facility.Type: GrantFiled: April 9, 2015Date of Patent: March 7, 2017Assignee: SZ DJI TECHNOLOGY CO., LTD.Inventors: Ji Dong Wei, Sheng Yang Chen, Tao Wang, Ji Yuan Ao, Yi Jun Guan
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Publication number: 20150321094Abstract: A sensing apparatus may be provided capable of detecting a hit by a projectile, such as a BB pellet. The sensing apparatus may include a surface and accelerometer to detect the acceleration of the surface. A processor may determine whether a projectile hit has occurred. The sensing apparatus may be mounted onto a vehicle. The vehicle may be a robot capable of participating in a game. The robot game may occur within a facility.Type: ApplicationFiled: April 9, 2015Publication date: November 12, 2015Inventors: Ji Dong Wei, Sheng Yang Chen, Tao Wang, Ji Yuan Ao, Yi Jun Guan
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Patent number: 9028312Abstract: A sensing apparatus may be provided capable of detecting a hit by a projectile, such as a BB pellet. The sensing apparatus may include a surface and accelerometer to detect the acceleration of the surface. A processor may determine whether a projectile hit has occurred. The sensing apparatus may be mounted onto a vehicle. The vehicle may be a robot capable of participating in a game. The robot game may occur within a facility.Type: GrantFiled: May 15, 2014Date of Patent: May 12, 2015Assignee: SZ DJI Technology Co., LtdInventors: Ji Dong Wei, Sheng Yang Chen, Tao Wang, Ji Yuan Ao, Yi Jun Guan