Patents by Inventor Sherif Ahmed Abdel-Wahab Hammouda

Sherif Ahmed Abdel-Wahab Hammouda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210064714
    Abstract: Systems and methods for systems and methods for generating the complete set of IC design layout clips, or any part of the complete set, satisfying usefulness criteria and of a prespecified size. A method includes generating an initial set of integrated circuit (IC) design layout clips as a current set of IC design layout clips. The method includes removing any of IC design layout clips from the current set of IC design layout clips that do not meet the one or more usefulness criteria. The method includes, while a size of the IC design layout clips is less than a desired clip size, generating a new set of IC design layout clips from the current set of IC design layout clips according to every combination of pairs of the design layout clips in the current set of IC design layout clips, and repeating the removing process.
    Type: Application
    Filed: August 26, 2019
    Publication date: March 4, 2021
    Inventors: Mohamed-Nabil Sabry, Kareem Madkour, Sherif Ahmed Abdel-Wahab Hammouda
  • Patent number: 10922468
    Abstract: Systems and methods for systems and methods for generating the complete set of IC design layout clips, or any part of the complete set, satisfying usefulness criteria and of a prespecified size. A method includes generating an initial set of integrated circuit (IC) design layout clips as a current set of IC design layout clips. The method includes removing any of IC design layout clips from the current set of IC design layout clips that do not meet the one or more usefulness criteria. The method includes, while a size of the IC design layout clips is less than a desired clip size, generating a new set of IC design layout clips from the current set of IC design layout clips according to every combination of pairs of the design layout clips in the current set of IC design layout clips, and repeating the removing process.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: February 16, 2021
    Assignee: Mentor Graphics Corporation
    Inventors: Mohamed-Nabil Sabry, Kareem Madkour, Sherif Ahmed Abdel-Wahab Hammouda
  • Patent number: 7730433
    Abstract: An analog retargeting system and method are disclosed for converting a circuit from a source technology to a target technology. Thus, an analog circuit in a source technology can be converted to another technology while maintaining substantially the same circuit behavior and specifications as the original design. The conversion includes analyzing and resizing the circuit at the device level. For example, the analysis may include determining a mode of operation for a transistor and resizing the transistor based on the mode of operation. In another example, the analysis may include determining node voltages coupled to a device and the resizing strategy may be adjusted based on the determined node voltages.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: June 1, 2010
    Inventors: Sherif Ahmed Abdel-Wahab Hammouda, Mohamed Amin Ibrahim Dessouky, Mohamed Sameh Tawfik
  • Publication number: 20080134109
    Abstract: An analog retargeting system and method are disclosed for converting a circuit from a source technology to a target technology. Thus, an analog circuit in a source technology can be converted to another technology while maintaining substantially the same circuit behavior and specifications as the original design. The conversion includes analyzing and resizing the circuit at the device level. For example, the analysis may include determining a mode of operation for a transistor and resizing the transistor based on the mode of operation. In another example, the analysis may include determining node voltages coupled to a device and the resizing strategy may be adjusted based on the determined node voltages.
    Type: Application
    Filed: September 29, 2005
    Publication date: June 5, 2008
    Inventors: Sherif Ahmed Abdel-Wahab Hammouda, Mohamed Amin Ibrahim Dessouky, Mohamed Sameh Tawfik