Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: A device includes a first channel structure, a second channel structure, and a gate structure. The first channel structure connects a first source region and a first drain region, and includes alternating stacking first semiconductor layers and second semiconductor layers. The second semiconductor layers have a width smaller than a width of the first semiconductor layers. The second channel structure connects a second source region and a second drain region. The second channel structure includes alternating stacking third semiconductor layers and fourth semiconductor layers. The fourth semiconductor layers have a width smaller than a width of the third semiconductor layers. The gate structure wraps around the first and second channel structures.

Abstract: A non-contact detection method for a nut is provided. The method includes the following steps. The nut is photographed to obtain a threaded hole image of the nut. A thread area comparison between the threaded hole image and a standard threaded hole image is performed. An area difference is obtained according to the result of the thread area comparison. Whether the nut is a good nut is determined according to the area difference.

Abstract: A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate. An oxide is removed from sidewalls of the first conductive gate and a dielectric material is applied to the sidewalls. Spacers adjacent to the conductive gate are removed to form voids, and the voids are capped with a dielectric material to form air spacers.

Abstract: A controller for controlling an electric motor module equipped with incremental encoder and operation method thereof are provided. The controller includes a quadruple frequency circuit, a driver circuit, a non-volatile memory (NVM) and a multi-phase control circuit. The multi-phase control circuit can perform multi-phase control with aid of the NVM, for example: reading an offset counter value from the NVM; executing an initial angle estimation procedure, generating an initial counter value according to an estimated initial angle and the offset counter value, and starting utilizing the driver circuit to directly control the electric motor to start with the estimated initial angle and utilizing a counter to perform counting operations; calculating a counter value error and clear the current counter value to be zero; and performing compensation corresponding to a predetermined compensation times count according to the counter value error, respectively, to control the rotor to reach a target angle.

Abstract: The present invention provides an image processing circuit including a receiving circuit, a reference value calculating circuit, a center luminance value calculating circuit and an output circuit. In the operations of the image processing circuit, the receiving circuit receives image data. The reference value calculating circuit determines a first reference value and a second reference value corresponding to a plurality of pixels of the image data. The center luminance value calculating circuit refers to the first reference value and the second reference value to generate a center luminance value. The output circuit determines output luminance values of the plurality of pixel values according to the image data, the first reference value and the second reference value.

Abstract: A device comprises source/drain regions over a substrate and spaced apart along a first direction, a first gate structure between the source/drain regions, and a first channel structure surrounded by the first gate structure. The first channel structure comprises alternately stacking first semiconductor layers and second semiconductor layers. When viewed in a cross section taken along a second direction perpendicular to the first direction, central axes of the second semiconductor layers are laterally offset from central axes of the first semiconductor layers.

Abstract: A modified socket for a plug having two pins to plug therein includes a casing, a rotatable cap, two pairs of electrical clips and a resilient means. The rotatable cap is rotatable between an inserting position and a power-on position. Each pair of electrical clips is disposed in the casing and has a fixed jaw and a movable jaw. The movable jaw is movable between a home position and an accumulating position. The resilient means is adapted for accumulating resilient force when the movable jaws are moved toward the accumulating positions and for releasing the resilient force to move the movable jaws to the home positions. During the rotation of the rotatable cap from the inserting position to the power-on position, the resilient means will accumulate the resilient force and then release it. The movable jaws will then contact and electrically connect to the pins.

Abstract: A device comprise a first semiconductor channel layer over a substrate, a second semiconductor channel layer over the first semiconductor channel layer, and source/drain epitaxial structures on opposite sides of the first semiconductor channel layer and opposite sides of the second semiconductor channel layer. A compressive strain in the second semiconductor channel layer is greater than a compressive strain in the first semiconductor channel layer. The source/drain epitaxial structures each comprise a first region interfacing the first semiconductor channel layer and a second region interfacing the second semiconductor channel layer, and the first region has a composition different from a composition of the second region.

Abstract: A device comprises a plurality of nanosheets, source/drain stressors, and a gate structure wrapping around the nanosheets. The nanosheets extend in a first direction above a semiconductor substrate and are arranged in a second direction substantially perpendicular to the first direction. The source/drain stressors are on either side of the nanosheets. Each of the source/drain stressors comprises a first epitaxial layer and a second epitaxial layer over the first epitaxial layer. The first and second epitaxial layers are made of a Group IV element and a Group V element. An atomic ratio of the Group V element to the Group IV element in the second epitaxial layer is greater than an atomic ratio of the Group V element to the Group IV element in the first epitaxial layer.

Abstract: A calibration method of three-dimensional measurement system includes a projection device, a camera and a processor. The projection device projects structural light to a reference object including a first calibration surface and a second calibration surface. The camera photographs the reference object to obtain at least one reference object image. The processor performs decoding according to the at least one reference object image to obtain a plurality of pieces of phase data of the at least one reference object image. The processor computes a first phase corresponding to the first calibration surface and a second phase corresponding to the second calibration surface according to the phase data, calculates a surface phase difference between the first phase and the second phase, and computes according to the surface phase difference and a height of the second calibration surface relative to the first calibration surface to obtain a phase-height conversion parameter.

Abstract: An image obtaining method comprises: by a projecting device, separately projecting an image acquisition light and a reference light onto a target object, wherein the light intensity of the image acquisition light is higher than the light intensity of the reference light; by an image obtaining device, obtaining a first image and a second image, both the first image and the second image comprising the image of the target object, with the target object of the first image being illuminated by the image acquisition light, and the target object of the second image being illuminated by the reference light, wherein the first image has a first area including a part of the target object, and the second image has a second area including the part of the target object; and by a computing device, performing a difference evaluation procedure to obtain a required light intensity based on a required amount.

Abstract: A semiconductor device includes a substrate, a semiconductor strip, an isolation dielectric, a plurality of channel layers, a gate structure, a plurality of source/drain structures, and an isolation layer. The semiconductor strip extends upwardly from the substrate and has a length extending along a first direction. The isolation dielectric laterally surrounds the semiconductor strip. The channel layers extend in the first direction above the semiconductor strip and arrange in a second direction substantially perpendicular to the substrate. The gate structure surrounds each of the channel layers. The source/drain structures are above the semiconductor strip and on either side of the channel layers. The isolation layer is interposed between the semiconductor strip and the gate structure and further interposed between the semiconductor strip and each of the plurality of source/drain structures.

Abstract: A MOSFET structure including stacked vertically isolated MOSFETs and a method for forming the same are disclosed.

Abstract: An image processing circuit capable of detecting an edge component includes: a selecting circuit acquiring the brightness values of pixels of an image according to the position of a target pixel and a processing region, wherein the pixels include N horizontal lines and M vertical lines; a brightness-variation calculating circuit generating N horizontal-line-brightness-variation values according to brightness variation of the N horizontal lines, and generating M vertical-line-brightness-variation values according to brightness variation of the M vertical lines; a brightness-variation determining circuit choosing a horizontal-line-brightness-variation representative value among the N horizontal-line-brightness-variation values, choosing a vertical-line-brightness-variation representative value among the M vertical-line-brightness-variation values, and choosing a brightness-variation representative value between the two representative values; an energy-variation calculating circuit generating an energy-variation

Abstract: A device comprises source/drain regions over a substrate and spaced apart along a first direction, a first gate structure between the source/drain regions, and a first channel structure surrounded by the first gate structure. The first channel structure comprises alternately stacking first semiconductor layers and second semiconductor layers. When viewed in a cross section taken along a second direction perpendicular to the first direction, central axes of the second semiconductor layers are laterally offset from central axes of the first semiconductor layers.

Abstract: The present invention provides an image processing circuit and associated image processing method. In the image processing circuit, a characteristic value calculation circuit is designed to calculate the plurality of characteristic values of consecutive-three-pixels with increasing/decreasing brightness, the plurality of left-side characteristic values of consecutive-three-pixels with increasing/decreasing brightness and the plurality of right-side characteristic values of consecutive-three-pixels with increasing/decreasing brightness, for the brightness adjustments. The adjusted brightness values of the present invention have sharper edges to improve the image quality.

Abstract: The present invention discloses an image processing circuit, wherein the image processing circuit comprises a receiving circuit, a sharpness processing circuit, a luminance variation processing circuit and an output circuit. In the operations of the image processing circuit, the receiving circuit is configured to receive image data; the sharpness processing circuit is configured to perform a high-pass filtering operation on the image data to generate processed image data; the luminance variation processing is configured to determine a high frequency component of each pixel within the image data, and for each pixel, the luminance variation processing circuit is configured to calculate a difference between high frequency components of the pixel and neighboring pixel(s) to generate auxiliary image data; and the output circuit is configured to generate output image according to the processed image data and the auxiliary image data.

Abstract: An image obtaining method comprises: by a projecting device, separately projecting an image acquisition light and a reference light onto a target object, wherein the light intensity of the image acquisition light is higher than the light intensity of the reference light; by an image obtaining device, obtaining a first image and a second image, both the first image and the second image comprising the image of the target object, with the target object of the first image being illuminated by the image acquisition light, and the target object of the second image being illuminated by the reference light, wherein the first image has a first area including a part of the target object, and the second image has a second area including the part of the target object; and by a computing device, performing a difference evaluation procedure to obtain a required light intensity based on a required amount.