Patents by Inventor Shibaji Banerjee

Shibaji Banerjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Clock re-convergence pessimism removal through pin sharing during clock tree planning
    Patent number: 11914939
    Abstract: A method includes receiving a circuit design. The circuit design includes blocks, a clock port, and two or more clock sinks across the blocks. The method further includes determining, by one or more processors, a common clock path between the clock port and the two or more clock sinks across the blocks. Further, the method includes determining a clock latency based on the common clock path.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: February 27, 2024
    Assignee: Synopsys, Inc.
    Inventors: Prashant Gupta, Shibaji Banerjee, Sivakumar Arulanantham