Abstract: A platen assembly includes a platen body, a polishing pad, and a fountain slurry supplier. The platen body has an upper surface. The polishing pad is disposed on the upper surface of the platen body. The fountain slurry supplier is at least partially disposed on the upper surface of the platen body for supplying slurry up onto the polishing pad.

Abstract: A method for operating a polishing head is provided. The method includes keeping a stator of at least one electromagnetism actuated pressure sector stationary with respect to a carrier head, and electromagnetically and linearly moving an active cell of the electromagnetism actuated pressure sector with the stator to linearly move the active cell with respect to the carrier head.

Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.

Abstract: A polishing head for a chemical-mechanical polishing system includes a carrier head, at least one electromagnetism actuated pressure sector and a membrane. The electromagnetism actuated pressure sector is disposed on the carrier head. The membrane covers the electromagnetism actuated pressure sector.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.

Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.

Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate and forming a metal gate stack including a metal gate electrode over the semiconductor substrate. The method also includes applying an oxidizing solution containing an oxidizing agent over the metal gate electrode to oxidize the metal gate electrode to form a metal oxide layer on the metal gate electrode.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 ? to about 40 ?. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The MG layer is formed on the ILD regions.

Abstract: A platen assembly includes a platen body, a polishing pad, and a fountain slurry supplier. The platen body has an upper surface. The polishing pad is disposed on the upper surface of the platen body. The fountain slurry supplier is at least partially disposed on the upper surface of the platen body for supplying slurry up onto the polishing pad.

Abstract: A polishing head for a chemical-mechanical polishing system includes a carrier head, at least one electromagnetism actuated pressure sector and a membrane. The electromagnetism actuated pressure sector is disposed on the carrier head. The membrane covers the electromagnetism actuated pressure sector.

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate and forming a structure over the semiconductor substrate. The structure includes a sacrificial dielectric on the semiconductor substrate and a dummy gate over the sacrificial dielectric. The method further includes removing the dummy gate and the sacrificial dielectric from the structure thereby forming a trench. The method further includes filling a metal layer into the trench and covering over a top surface of an inter layer dielectric (ILD). The method also includes performing a chemical mechanical polishing (CMP) to expose the top surface of the ILD and heating the top surface of the ILD. Moreover, the method includes forming an etch stop layer on the top surface of the ILD.

Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.

Abstract: Embodiments of mechanisms for performing a chemical mechanical polishing (CMP) process are provided. A method for performing a CMP process includes polishing a wafer by using a polishing pad. The method also includes applying a cleaning liquid jet on the polishing pad to condition the polishing pad. A CMP system is also provided.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 ? to about 40 ?. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion.

Abstract: A method includes forming an etch stop layer over and contacting a gate electrode of a transistor, forming a sacrificial layer over the etch stop layer, and etching the sacrificial layer, the etch stop layer, and an inter-layer dielectric layer to form an opening. The opening is then filled with a metallic material. The sacrificial layer and excess portions of the metallic material over a top surface of the etch stop layer are removed using a removal step including a CMP process. The remaining portion of the metallic material forms a contact plug.

Abstract: A method includes forming an etch stop layer over and contacting a gate electrode of a transistor, forming a sacrificial layer over the etch stop layer, and etching the sacrificial layer, the etch stop layer, and an inter-layer dielectric layer to form an opening. The opening is then filled with a metallic material. The sacrificial layer and excess portions of the metallic material over a top surface of the etch stop layer are removed using a removal step including a CMP process. The remaining portion of the metallic material forms a contact plug.

Abstract: A system and method for cleaning a surface of a semiconductor device is disclosed. An embodiment comprises buffing the first surface with a cleaning solution comprising a reactant that will remove a portion of the first surface and also change the first surface from hydrophobic to hydrophilic. The first surface may further be cleaned using a brushing process that also utilizes the cleaning solution.

Abstract: A novel process for the preparation of ultra-fine powders of metal oxide wherein a surfactant is added to the solution for the preparation of the metal oxide to provide nanometer metal oxide powders without the utilization of vacuum or high pressure conditions is disclosed.