Patents by Inventor Shigehisa Kurogo

Shigehisa Kurogo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Voltage control type temperature compensation piezoelectric oscillator
    Patent number: 8058941
    Abstract: A voltage control type temperature compensation piezoelectric oscillator, includes: a voltage control type oscillation circuit; an automatic frequency control (AFC) circuit outputting a control voltage for controlling an oscillation frequency of the voltage control type oscillation circuit based on an external control voltage; a temperature compensation voltage generating circuit generating a temperature compensation voltage; and a gain variable circuit varying a gain of the temperature compensation voltage. In the oscillator, the gain variable circuit is controlled by the control voltage outputted from the AFC circuit, and the oscillation frequency of the voltage control type oscillation circuit is controlled by an output voltage of the gain variable circuit.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: November 15, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Shigehisa Kurogo, Masayuki Ishikawa, Atsushi Kiyohara, Takehiro Yamamoto, Norihito Matsukawa
  • VOLTAGE CONTROL TYPE TEMPERATURE COMPENSATION PIEZOELECTRIC OSCILLATOR
    Publication number: 20100127787
    Abstract: A voltage control type temperature compensation piezoelectric oscillator, includes: a voltage control type oscillation circuit; an automatic frequency control (AFC) circuit outputting a control voltage for controlling an oscillation frequency of the voltage control type oscillation circuit based on an external control voltage; a temperature compensation voltage generating circuit generating a temperature compensation voltage; and a gain variable circuit varying a gain of the temperature compensation voltage. In the oscillator, the gain variable circuit is controlled by the control voltage outputted from the AFC circuit, and the oscillation frequency of the voltage control type oscillation circuit is controlled by an output voltage of the gain variable circuit.
    Type: Application
    Filed: November 16, 2009
    Publication date: May 27, 2010
    Applicant: EPSON TOYOCOM CORPORATION
    Inventors: Shigehisa KUROGO, Masayuki ISHIKAWA, Atsushi KIYOHARA, Takehiro YAMAMOTO, Norihito MATSUKAWA
  • Piezoelectric-oscillator
    Patent number: 7439819
    Abstract: Deterioration in frequency stability with time in a conventional piezoelectric oscillator using an accumulation type MOS capacitance element is improved. A P-channel transistor type or an N-channel transistor type is used as a MOS capacitance element in a variable capacitance circuit used in a piezoelectric oscillator. A bias voltage is applied between P-type or N-type extraction electrodes formed in source and drain regions and an N-type extraction electrode provided in an N-well region or a P-type extraction electrode provided in a P-well region. Instability in the MOS capacitance element with time is thus eliminated.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: October 21, 2008
    Assignees: Epson Toyocom Corporation, NEC Electronics Corporation
    Inventors: Tsuyoshi Ohshima, Shigehisa Kurogo, Masayuki Ishikawa, Susumu Kurosawa, Yuki Fujimoto, Yasutaka Nakashiba
  • Piezo-oscillator
    Publication number: 20060208816
    Abstract: Deterioration in frequency stability with time in a conventional piezoelectric oscillator using an accumulation type MOS capacitance element is improved. A P-channel transistor type or an N-channel transistor type is used as a MOS capacitance element in a variable capacitance circuit used in a piezoelectric oscillator. A bias voltage is applied between P-type or N-type extraction electrodes formed in source and drain regions and an N-type extraction electrode provided in an N-well region or a P-type extraction electrode provided in a P-well region. Instability in the MOS capacitance element with time is thus eliminated.
    Type: Application
    Filed: August 3, 2004
    Publication date: September 21, 2006
    Inventors: Tsuyoshi Ohshima, Shigehisa Kurogo, Masayuki Ishikawa, Susumu Kurosawa, Yuki Fujimoto, Yasutaka Nakashiba