Patents by Inventor Shigehisa Tanaka

Shigehisa Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030218226
    Abstract: Reducing a dark current in a semiconductor photodetector provided with a second mesa including an regrown layer around a first mesa. An n-type buffer layer, a n-type multiplication layer, a p-type field control layer, a p-type absorption layer, a cap layer made of p-type InAlAs crystal, and a p-type contact layer 107 are made to grow on a main surface of a n-type substrate. Thereafter the p-type contact layer, the p-type cap layer, the p-type absorption layer and the p-type field control layer are patterned to form a first mesa. Next, after making a p-type regrown layer selectively grow around the first mesa or by forming a groove in the regrow layer located in a vicinity of the p-type cap type during a step of the selective growth, the p-type cap layer containing Al and the regrow layer are separated owing to the groove such that no current path is formed between both layers.
    Type: Application
    Filed: August 19, 2002
    Publication date: November 27, 2003
    Applicant: OpNext Japan, Inc.
    Inventors: Kazuhiro Ito, Shigehisa Tanaka, Sumiko Fujisaki, Yasunobu Matsuoka, Takashi Toyonaka
  • Patent number: 6635908
    Abstract: The object of disclosing the novel art consists in providing a highly reliable mesa-structured avalanche photo-diode using a novel structure capable of keeping the dark current low, and a fabrication method thereof. The avalanche photo-diode for achieving the object has an absorption layer for absorbing light to generate a carrier, a multiplication layer for multiplying the generated carrier, and a field control layer inserted between the absorption layer and the multiplication layer. Moreover, a first mesa including at least part of the multiplication layer and part of the field control layer is formed over a substrate, a second mesa including another part of the field control layer and the absorption layer is formed over the first mesa, the area of the top surface of the first mesa is greater than that of the bottom surface of the second mesa, and a semiconductor layer is formed over the part of the first mesa top surface not covered by the second mesa and the side surface of the second mesa.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: October 21, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shigehisa Tanaka, Yasunobu Matsuoka, Kazuhiro Ito, Tomohiro Ohno, Sumiko Fujisaki, Akira Taike, Tsukuru Ohtoshi, Shinji Tsuji
  • Publication number: 20020135036
    Abstract: An ultrahigh speed, high sensitivity photodetector, optical module and/or optical transmission device made by reducing the size of a surface illuminated type photodetector to decrease capacitance C. The effective detecting area on a side of the substrate that is opposite to a light incidence side of the substrate in a surface illuminated type photodetector and that is reached by the incident light passing through the semiconductor includes a plurality of ohmic contact areas and a reflector. The reflector may be a laminate comprised of two films in contact with the semiconductor including a transparent film (lower) and a metal film (upper). The size of the ohmic contacts may be small when compared to the wavelength of light incident on the surface of the photodetector. The photodetector may be used in ultrahigh speed, high sensitivity optical modules, semiconductor photo receivers and optical transmission devices with increased transmission capacities.
    Type: Application
    Filed: July 17, 2001
    Publication date: September 26, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Akihisa Terano, Yasunobu Matsuoka, Shigehisa Tanaka
  • Publication number: 20020117697
    Abstract: The object of disclosing the novel art consists in providing a highly reliable mesa-structured avalanche photo-diode using a novel structure capable of keeping the dark current low, and a fabrication method thereof. The avalanche photo-diode for achieving the object has an absorption layer for absorbing light to generate a carrier, a multiplication layer for multiplying the generated carrier, and a field control layer inserted between the absorption layer and the multiplication layer. Moreover, a first mesa including at least part of the multiplication layer and part of the field control layer is formed over a substrate, a second mesa including another part of the field control layer and the absorption layer is formed over the first mesa, the area of the top surface of the first mesa is greater than that of the bottom surface of the second mesa, and a semiconductor layer is formed over the part of the first mesa top surface not covered by the second mesa and the side surface of the second mesa.
    Type: Application
    Filed: August 31, 2001
    Publication date: August 29, 2002
    Inventors: Shigehisa Tanaka, Yasunobu Matsuoka, Kazuhiro Ito, Tomohiro Ohno, Sumiko Fujisaki, Akira Taike, Tsukuru Ohtoshi, Shinji Tsuji
  • Patent number: 5724462
    Abstract: An integrated optical semiconductor device and an optical fiber gyroscope using the same. The semiconductor device comprises a super luminescence diode, at least one waveguide type photo-diode and at least one Y-branch integrated on a single semiconductor substrate. The waveguide structure of the super luminescence diode, photo-diode and Y-branch shares common optical guide layers formed by concurrent crystal growth. At least part of the optical guide layers are located on the side of the semiconductor substrate away from an active layer of the super luminescence diode and an optical absorption layer of the photo-diode.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: March 3, 1998
    Assignees: Hitachi, Ltd., Hitachi Cable, Ltd.
    Inventors: Tatemi Ido, Shigehisa Tanaka, Ryoji Suzuki, Toshiya Yuhara
  • Patent number: 5543629
    Abstract: A superlattice APD includes light absorption layer for generating carriers by absorbing light, a multiplication layer for multiplying the carriers, and a pair of electrodes for driving the carriers. The multiplication layer includes a superlattice structure with a well layer less than 10 nm in thickness and a barrier layer more than 10 nm and less than 20 nm in thickness deposited in alternate layers.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: August 6, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hitoshi Nakamura, Shoichi Hanatani, Shigehisa Tanaka, Tsukuru Ohtoshi, Koji Ishida, Yausunobu Matsuoka