Patents by Inventor Shigekatsu Tateno

Shigekatsu Tateno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8738812
    Abstract: A controller controls transfer of commands and storage data over a databus to a data storage device. The controller comprises a memory arranged to store a queue of commands prior to the commands being transferred over the databus. The controller identifies data access commands in the queue that specify the same type of data access and contiguous ranges of addresses. A concatenated data access command is transferred in place of so identified data access commands, the concatenated data access command specifying the same type of data access and the overall range of addresses. This improves the rate of data transfers.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: May 27, 2014
    Assignee: PLX Technology, Inc.
    Inventors: Matthew Stephens, Shigekatsu Tateno
  • Publication number: 20120017035
    Abstract: In a first embodiment of the present invention, a method for allowing a microprocessor to access a flash memory is provided, the method comprising: fetching code instructions and data from the flash memory via a unidirectional code bus coupled to a flash controller, which is coupled to a databus interface, which is coupled to the flash memory; executing the code instructions in a manner that is substantially similar to that as used for a read only memory (ROM) coupled to the microprocessor; and writing data to the flash memory via a bidirectional databus separate from the unidirectional code bus, wherein the bidirectional databus is coupled to the databus interface and to a scratch memory, wherein the writing comprises using write flash procedures located in the ROM, the write flash procedures comprising instructions for reading and using parameter values stored in the scratch memory and for erasing memory locations and writing data to memory locations in the flash memory.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 19, 2012
    Applicant: PLX TECHNOLOGY, INC.
    Inventors: Shigekatsu TATENO, Julien MARGETTS
  • Publication number: 20100306417
    Abstract: A controller controls transfer of commands and storage data over a databus to a data storage device. The controller comprises a memory arranged to store a queue of commands prior to the commands being transferred over the databus. The controller identifies data access commands in the queue that specify the same type of data access and contiguous ranges of addresses. A concatenated data access command is transferred in place of so identified data access commands, the concatenated data access command specifying the same type of data access and the overall range of addresses. This improves the rate of data transfers.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 2, 2010
    Inventors: Matthew Stephens, Shigekatsu Tateno