Patents by Inventor Shigeki Komori
Shigeki Komori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8368066Abstract: A display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area is necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer which is over the gate insulating layer and overlaps with the gate electrode; and a first wiring layer and a second wiring layer each of which is formed by stacking a conductive layer and a second oxide semiconductor layer and whose end portions are over the first oxide semiconductor layer and overlap with the gate electrode. The gate electrode of the non-linear element is connected to a scan line or a signal line, the first wiring layer or the second wiring layer of the non-linear element is directly connected to the gate electrode layer so as to apply potential of the gate electrode.Type: GrantFiled: October 1, 2009Date of Patent: February 5, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
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Patent number: 8361820Abstract: An objective is simplification of a manufacturing method of a liquid crystal display device or the like. In a manufacturing method of a thin film transistor, a stack in which a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order is formed, and the first conductive film is exposed by first etching and a pattern of the second conductive film is formed by second etching. Further, after thin film transistors are formed, a color filter layer is formed so that unevenness caused by the thin film transistors or the like is relieved; thus, the level difference of the surface where the pixel electrode layer is formed is reduced. Alternatively, a color filter layer is selectively formed utilizing the unevenness caused by thin film transistors or the like.Type: GrantFiled: October 31, 2011Date of Patent: January 29, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shigeki Komori
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Patent number: 8334540Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.Type: GrantFiled: June 30, 2011Date of Patent: December 18, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
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Publication number: 20120300150Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.Type: ApplicationFiled: August 6, 2012Publication date: November 29, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Tomoya FUTAMURA, Takahiro KASAHARA
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Patent number: 8304765Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.Type: GrantFiled: September 10, 2009Date of Patent: November 6, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
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Patent number: 8227278Abstract: The present invention provides a method for manufacturing a thin film transistor with small leakage current and high switching characteristics. In a method for manufacturing a thin film transistor, a back channel portion is formed in the thin film transistor by conducting etching using a resist mask, the resist mask is removed by removal or the like, and a superficial part of the back channel portion is further etched. Through the steps, components of chemical solution used for the removal, residues of the resist mask, and the like which exist at the superficial part of the back channel portion can be removed and leakage current can be reduced. The further etching step of the back channel portion is preferably conducted by dry etching using an N2 gas or a CF4 gas with bias not applied.Type: GrantFiled: August 21, 2009Date of Patent: July 24, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinya Sasagawa, Akihiro Ishizuka, Shigeki Komori
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Publication number: 20120129288Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: ApplicationFiled: January 31, 2012Publication date: May 24, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoshi KOBAYASHI, Ikuko Kawamata, Koji Dairiki, Shigeki Komori, Toshiyuki Isa, Shunpei Yamazaki
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Patent number: 8148723Abstract: A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order (a thin-film stacked body); first etching is performed to expose the first conductive film and form at least a pattern of the thin-film stacked body; second etching is performed to form a pattern of the first conductive film. The second etching is performed under a condition in which the first conductive film is side-etched. Further, after forming the patterns, an EL layer can be formed selectively by utilizing a depression and a projection due to the patterns.Type: GrantFiled: July 8, 2011Date of Patent: April 3, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shigeki Komori, Ryu Komatsu
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Patent number: 8133771Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: GrantFiled: July 16, 2010Date of Patent: March 13, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Kobayashi, Ikuko Kawamata, Koji Dairiki, Shigeki Komori, Toshiyuki Isa, Shunpei Yamazaki
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Publication number: 20120045860Abstract: An objective is simplification of a manufacturing method of a liquid crystal display device or the like. In a manufacturing method of a thin film transistor, a stack in which a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order is formed, and the first conductive film is exposed by first etching and a pattern of the second conductive film is formed by second etching. Further, after thin film transistors are formed, a color filter layer is formed so that unevenness caused by the thin film transistors or the like is relieved; thus, the level difference of the surface where the pixel electrode layer is formed is reduced. Alternatively, a color filter layer is selectively formed utilizing the unevenness caused by thin film transistors or the like.Type: ApplicationFiled: October 31, 2011Publication date: February 23, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shigeki KOMORI
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Patent number: 8101442Abstract: A manufacture process of a thin film transistor mounted on an EL display device is simplified. A thin film transistor is manufactured by stacking a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film; forming a first resist mask over the stacked films; performing first etching to form a thin-film stack body; performing second etching by side etching is conducted on the thin-film stack body to form a gate electrode layer; and forming a source and drain electrode layer and the like with use of a second resist mask. An EL display device is manufactured using the thin film transistor.Type: GrantFiled: February 20, 2009Date of Patent: January 24, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Shigeki Komori, Toshiyuki Isa, Atsushi Umezaki
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Patent number: 8049221Abstract: An objective is simplification of a manufacturing method of a liquid crystal display device or the like. In a manufacturing method of a thin film transistor, a stack in which a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order is formed, and the first conductive film is exposed by first etching and a pattern of the second conductive film is formed by second etching. Further, after thin film transistors are formed, a color filter layer is formed so that unevenness caused by the thin film transistors or the like is relieved; thus, the level difference of the surface where the pixel electrode layer is formed is reduced. Alternatively, a color filter layer is selectively formed utilizing the unevenness caused by thin film transistors or the like.Type: GrantFiled: February 23, 2009Date of Patent: November 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shigeki Komori
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Publication number: 20110260208Abstract: A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order (a thin-film stacked body); first etching is performed to expose the first conductive film and form at least a pattern of the thin-film stacked body; second etching is performed to form a pattern of the first conductive film. The second etching is performed under a condition in which the first conductive film is side-etched. Further, after forming the patterns, an EL layer can be formed selectively by utilizing a depression and a projection due to the patterns.Type: ApplicationFiled: July 8, 2011Publication date: October 27, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shigeki KOMORI, Ryu KOMATSU
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Publication number: 20110260159Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.Type: ApplicationFiled: June 30, 2011Publication date: October 27, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Tomoya FUTAMURA, Takahiro KASAHARA
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Patent number: 7993991Abstract: A manufacturing method of a thin film transistor and a display device using a small number of masks is provided. A first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked. Then, a resist mask having a recessed portion is formed thereover using a multi-tone mask. First etching is performed to form a thin-film stack body, and second etching in which the thin-film stack body is side-etched is performed to form a gate electrode layer. The resist is made to recede, and then, a source electrode, a drain electrode, and the like are formed; accordingly, a thin film transistor is manufactured.Type: GrantFiled: December 2, 2008Date of Patent: August 9, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Shigeki Komori, Toshiyuki Isa, Ryu Komatsu
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Patent number: 7989815Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.Type: GrantFiled: October 1, 2009Date of Patent: August 2, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Tomoya Futamura, Takahiro Kasahara
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Patent number: 7985605Abstract: A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order (a thin-film stacked body); first etching is performed to expose the first conductive film and form at least a pattern of the thin-film stacked body; second etching is performed to form a pattern of the first conductive film. The second etching is performed under a condition in which the first conductive film is side-etched. Further, after forming the patterns, an EL layer can be formed selectively by utilizing a depression and a projection due to the patterns.Type: GrantFiled: April 13, 2009Date of Patent: July 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shigeki Komori, Ryu Komatsu
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Publication number: 20110133183Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.Type: ApplicationFiled: February 3, 2011Publication date: June 9, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
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Patent number: 7947538Abstract: It is an object of the present invention to form a plurality of elements in a limited area to reduce the area occupied by the elements for integration so that further higher resolution (increase in number of pixels), reduction of each display pixel pitch with miniaturization, and integration of a driver circuit that drives a pixel portion can be advanced in semiconductor devices such as liquid crystal display devices and light-emitting devices that has EL elements. A photomask or a reticle provided with an assist pattern that is composed of a diffraction grating pattern or a semi-transparent film and has a function of reducing a light intensity is applied to a photolithography process for forming a gate electrode to form a complicated gate electrode. In addition, a top-gate TFT that has the multi-gate structure described above and a top gate TFT that has a single-gate structure can be formed on the same substrate just by changing the mask without increasing the number of processes.Type: GrantFiled: August 3, 2009Date of Patent: May 24, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideto Ohnuma, Masaharu Nagai, Mitsuaki Osame, Masayuki Sakakura, Shigeki Komori, Shunpei Yamazaki
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Publication number: 20100285624Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: ApplicationFiled: July 16, 2010Publication date: November 11, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoshi KOBAYASHI, Ikuko KAWAMATA, Koji DAIRIKI, Shigeki KOMORI, Toshiyuki ISA, Shunpei YAMAZAKI