Patents by Inventor Shigeki Matsuoka
Shigeki Matsuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080190907Abstract: A method of connecting metal materials to each other, wherein a pin fitted to the tip of a metal bar-like rotating tool (10) is inserted between the end pan of a metal member (I) and the end part of a metal member (1?), and moved, while rotating, along the longitudinal direction of these end parts. By this frictional heat is generated between the metal members (1) and (1?) and the rotating tool (10), and the metal member (1) is connected to the metal member (1?). The rotating tool (10) is formed of a wide shoulder (12) and a thin pin (11) formed at the tip thereof and inserted between the end parts of the metal members. The pin (11) is a right circular cylindrical pin. The side face of the pin (11) is formed in a smooth curved surface, and a thread groove is not formed therein.Type: ApplicationFiled: March 14, 2005Publication date: August 14, 2008Applicants: Hidetoshi Fujii, Tokyu Car CorporationInventors: Hidetoshi Fujii, Lin Cui, Shigeki Matsuoka, Takeshi Ishikawa, Kazuo Genchi
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Publication number: 20080142572Abstract: A pin formed at front end of a rotary tool 10 made of a metal in a rod shape is inserted between an edge of a metallic member 1 and an edge of a metallic member 1?, which inserted pin is moved along the longitudinal direction of the edges while rotating the pin, thereby generating friction heat between each of the metallic members 1 and 1? and the rotary tool 10 to weld the metallic member 1 with the metallic member 1? together. The rotary tool 10 is structured by a wide shoulder 12 and a thin pin 11 formed at the front end of the shoulder 12 and being inserted between the edges of the metallic members. Here, the pin 11 is in a right-cylindrical shape, being formed into smooth curved surface on the side thereof, and having no thread groove thereon.Type: ApplicationFiled: March 14, 2005Publication date: June 19, 2008Applicants: HIDETOSHI FUJII, TOKYU CAR CORORATIONInventors: Hidetoshi Fujii, Lin Cui, Shigeki Matsuoka, Takeshi Ishikawa, Kazuo Genchi
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Publication number: 20050173145Abstract: Synthetic resin films 4, 4 are bonded to a thin foam sheet 2 on both sides. Numerous through-holes 5 are formed in the laminated sheet from the front to back side. A conductive coating material is applied to the surfaces of the films 4, 4 and fill the numerous through-holes 5 to form conductive layers 6, 6 on the surfaces of the films 4, 4 and numerous conductive passages 6a in the numerous through-holes 5 connected to conductive layers 6, 6. In another structure, a film and a conductive layer are formed on one side of the foam sheet, numerous conductive coating segments are formed near the openings of numerous through-holes on the back, and the conductive layer and numerous conductive coating segments are connected via numerous conductive passages.Type: ApplicationFiled: February 7, 2005Publication date: August 11, 2005Applicant: Zippertubing Japan, Ltd.Inventors: Hiraaki Ohtsuka, Haruka Saito, Motoyasu Baba, Shigeki Matsuoka
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Patent number: 5500307Abstract: A solid oxide fuel cell, which comprises an assembly of a plurality of unit cells each comprising a solid electrolyte, and a fuel electrode and an air electrode provided on both sides of the solid electrolyte, respectively, the fuel electrode being composed mainly of ruthenium, nickel and ceramics can perform power generation of high efficiency with hydrocarbon or hydrogen resulting from complete reforming of hydrocarbon, or a steam-reformed gas containing carbon monoxide as the main component as a fuel gas.Type: GrantFiled: June 12, 1995Date of Patent: March 19, 1996Assignees: Nippon Oil Company, Petroleum Energy Center FoundationInventors: Iwao Anzai, Shigeki Matsuoka, Jun Uehara
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Patent number: 5012448Abstract: A multilevel sense circuit includes a memory MOSFET having one of at least two different current carrying states and a pair of reference MOSFETs one of which has one of the two current carrying states and the other of which has the other current carrying state. A first current supplying circuit is connected to the memory MOSFET for supplying a predetermined amount of current thereto when the memory MOSFET is activated. A second current supplying circuit is connected to the pair of reference MOSFETs and also to the first current supplying circuit, such that twice the aforementioned predetermined amount of current is supplied to the pair of reference MOSFETs when the memory MOSFET is activated. A multilevel semiconductor memory device includes a MOSFET having a channel whose width is varyingly set by providing a non-inverting region in a selected area of the channel by ion implantation.Type: GrantFiled: July 15, 1988Date of Patent: April 30, 1991Assignee: Ricoh Company, Ltd.Inventors: Shigeki Matsuoka, Hiizu Okubo, Daisuke Kosaka
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Patent number: 4958311Abstract: A composite finite impulse response digital filter for use in an image processing apparatus or the like includes a plurality of sub-filters connected in series. In each sub-filter, a random access memory (RAM) is provided for storing an input data and a barrel shifter is provided for shifting the data to a least significant bit (LSB) or most significant bit (MSB) side over the number of shifts corresponding to a first control signal. Because of the provision of the barrel shifter in each sub-circuit, it is not necessary to shift a data input into an input terminal over a predetermined number of bits before storing into the RAM. Thus, the memory capacity of the RAM can be significantly reduced in size.Type: GrantFiled: March 27, 1989Date of Patent: September 18, 1990Assignee: Ricoh Company, Ltd.Inventors: Yukio Kadowaki, Shigeki Matsuoka, Shogo Nakamura
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Patent number: 4949297Abstract: An adder has first through third switching circuits, a logic circuit and an adding circuit part. The first switching circuit is coupled between a carry bit input terminal and a carry bit output terminal. The second switching circuit is coupled between a first power source voltage and the carry bit output terminal, and the third switching circuit is coupled between a second power source voltage and the carry bit output terminal. The logic circuit controls the ON/OFF states of the first through third switching circuits so that only one switching circuit is turned ON responsive to two binary values which are to be added in the adding circuit part. The propagation time of a carry bit signal from the carry bit input terminal to the carry bit output terminal is constant regardless of the number of bits of the adding circuit part.Type: GrantFiled: August 25, 1988Date of Patent: August 14, 1990Assignee: Ricoh Company, Ltd.Inventor: Shigeki Matsuoka
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Patent number: 4751682Abstract: A sense circuit for sensing a memory state of a memory transistor in a semiconductor memory device by determining whether the memory transistor is on or off is provided. The sense circuit includes a first load P-channel MOS transistor for supplying a first current to the memory transistor, a reference transistor capable of passing a second current same in magnitude as the on current of the memory transistor, and a second load P-channel MOS transistor for supplying the second current to the reference transistor, whereby the second load P-channel MOS transistor is operatively coupled to the first load P-channel MOS transistor.Type: GrantFiled: February 14, 1986Date of Patent: June 14, 1988Assignee: Ricoh Company, Ltd.Inventors: Shigeki Matsuoka, Takayoshi Shimizu, Takao Jinzai
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Patent number: 4720816Abstract: A system and method for programming an EPROM which includes a bit line, a plurality of memory cell MOS transistors connected to the bit line, a switching transistor for selectively applying a programming voltage to the bit line, and a selection circuit for selecting one of the memory transistors for programming. In accordance with the principle of the present invention, when one of the memory transistors is selected for programming, the programming voltage is applied to the bit line and thus to the drain of the selected memory transistor and to the gate of the selected memory transistor. Then, even after termination of application of the programming voltage to the bit line, the programming voltage remains to be applied to the gate for a predetermined time period, thereby allowing charge stored in the parasitic capacitance of the bit line to be completely discharged through the selected transistor.Type: GrantFiled: February 14, 1986Date of Patent: January 19, 1988Assignee: Ricoh Company, Ltd.Inventors: Shigeki Matsuoka, Satoshi Kono
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Patent number: 4700125Abstract: A power supply switching circuit for supplying a pair of power supply voltages different in level, such as programming voltage V.sub.pp and reference voltage V.sub.cc, selectively is provided. The circuit includes a plurality of P-channel and N-channel MOS transistors which are appropriately connected such that no leakage or reverse current is produced even if the voltage at the V.sub.pp terminal becomes lower than V.sub.cc.Type: GrantFiled: September 30, 1985Date of Patent: October 13, 1987Assignee: Ricoh Co., Ltd.Inventors: Akira Takata, Shigeki Matsuoka
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Patent number: 4565960Abstract: A power supply switching circuit for supplying a pair of power supply voltages different in level, such as programming voltage V.sub.pp and reference voltage V.sub.cc, selectively is provided. The circuit includes a plurality of P-channel and N-channel MOS transistors which are appropriately connected such that no leakage or reverse current is produced even if the voltage at the V.sub.pp terminal becomes lower than V.sub.cc.Type: GrantFiled: July 11, 1984Date of Patent: January 21, 1986Assignee: Ricoh Company, Ltd.Inventors: Akira Takata, Shigeki Matsuoka
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Patent number: 4534801Abstract: A process for removing an adhered substance from steel ingots, which comprises heating or cooling a steel ingot after the casting under such conditions that the heating or cooling rate at the surface layer portion of the steel ingot is not less than 2.degree. C./sec and the temperature difference between the starting and end points is not less than 300.degree. C.Type: GrantFiled: February 17, 1983Date of Patent: August 13, 1985Assignee: Daido Steel Company LimitedInventors: Shigeki Matsuoka, Yoshihiro Naitoh
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Patent number: D762253Type: GrantFiled: January 27, 2012Date of Patent: July 26, 2016Assignee: JAPAN TRANSPORT ENGINEERING COMPANYInventors: Takeshi Ishikawa, Ai Masuda, Naoki Kawada, Kenji Hashimoto, Shigeki Matsuoka