Abstract: A luminaire includes a light source having a light-emitting element, and a communication device configured to transmit and/or receive a communication signal by wireless communication. The luminaire further includes a power supply configured to supply electric power to the light source and the communication device, and a housing configured to contain the communication device and the power supply. The light source is configured to be held by the housing. The housing is provided with an opening. The housing has a rectangular parallelepiped shape with electrically conductive walls to form a rectangular waveguide having a cutoff frequency. The housing is set to have a dimension in a width direction thereof such that a radio frequency of the communication signal is equal to or more than the cutoff frequency.

Abstract: A luminaire includes a light source having a light-emitting element, and a communication device configured to transmit and/or receive a communication signal by wireless communication. The luminaire further includes a power supply configured to supply electric power to the light source and the communication device, and a housing configured to contain the communication device and the power supply. The light source is configured to be held by the housing. The housing is provided with an opening. The housing has a rectangular parallelepiped shape with electrically conductive walls to form a rectangular waveguide having a cutoff frequency. The housing is set to have a dimension in a width direction thereof such that a radio frequency of the communication signal is equal to or more than the cutoff frequency.

Abstract: A laser diode having an optical cavity which is formed on top of a semiconductor substrate and has semiconductor crystals and an oxide layer that is substantially free from arsenic oxide. The oxide layer may be formed by using the matrix of the optical cavity as a matrix or a layer formed by the hydrogenation or oxygenation of the matrix of the cavity on at least one side of the optical cavity. The laser diode has a long operational life and high reliability without facet degradation.

Abstract: A semiconductor radiative device comprises a layered film comprised of a low-refraction first dielectric film and a high-refraction second dielectric film having a refraction index greater than that of the first dielectric film, and formed on at least one of facets of an optical cavity. The high-refraction second dielectric film is an amorphous dielectric film of nitrogen-doped hydrogenated silicon. The semiconductor radiative device is capable of stably operating in a high-output mode for a long period of time.

Abstract: A semiconductor radiative device comprises a layered film comprised of a low-refraction first dielectric film and a high-refraction second dielectric film having a refraction index greater than that of the first dielectric film, and formed on at least one of facets of an optical cavity. The high-refraction second dielectric film is an amorphous dielectric film of nitrogen-doped hydrogenated silicon. The semiconductor radiative device is capable of stably operating in a high-output mode for a long period of time.

Abstract: A laser diode having an optical cavity which is formed on top of a semiconductor substrate and has semiconductor crystals and an oxide layer that is substantially free from arsenic oxide. The oxide layer may be formed by using the matrix of the optical cavity as a matrix or a layer formed by the hydrogenation or oxygenation of the matrix of the cavity on at least one side of the optical cavity. The laser diode has a long operational life and high reliability without facet degradation.

Abstract: A method of forming a belt/belt sleeve having a length and teeth spaced lengthwise of the belt/belt sleeve. The method includes the steps of providing a cylindrical cloth having a sewn joint; providing a mold having an axis, a circumference, and a plurality of axially extending grooves spaced around the circumference of the mold; extending the cylindrical cloth around the mold; providing a rod; pressing the rod against the cloth at the sewn joint so as to urge the sewn joint into one of the axially extending grooves; separating the rod from the cloth; and forming at least one belt component around the cloth on the mold after the rod is separated from the cloth.

Abstract: In a method of selectively growing a crystal of a compound semiconductor layer which is composed of gallium and arsenic, a selective growth is selectively carried out on a substrate by using a combination of metallic gallium and a reactive gas, such as trisdimethylminoarsine, which includes a metallic compound of arsenic specified by at least one amine. The combination may includes organometallic gallium, such as trimethylgallium, triethylgallium instead of the metallic gallium. Such a combination serves to selectively deposit the compound semiconductor layer only on an exposed portion uncovered with a mask. Any other compound semiconductor layer may be selectively deposited on the exposed portion. The exposed portion may be composed of GaAs, AlGaAs, or InGaAs.

Abstract: A semiconductor device comprises a semiconductor substrate formed by a first single crystalline semiconductor material and semiconductor layers formed on the semiconductor substrate by a second single crystalline semiconductor material doped with an element which can easily surface segregate. The surface of the semiconductor substrate is formed of a crystalline plane substantially equivalent to a facet plane which is formed on the surface of the second single crystalline semiconductor material if the second single crystalline semiconductor material is epitaxially grown with being doped with the element on a (100) plane of the first single crystalline semiconductor material.

Abstract: On a surface of a p-type GaAs (111)B substrate 11, a mesa groove is formed along a [211]A direction. TDMAAs as a group V material and TMGa as a group III material are supplied at 8.times.10.sup.-3 Pa and 8.times.10.sup.-4 Pa, respectively, to grow n-type GaAs 13 dominantly on a side surface of a mesa 12. Subsequently, the group V material is changed to metal As. As.sub.4 and MAGa are supplied at 5.times.10.sup.-3 Pa and 8.times.10.sup.-4 Pa, respectively, to grow p-type GaAs 14 only on a side surface of the GaAs 13. Then, the group V material is again changed to TDMAAs. TDMAAs and TMGa are supplied both at 8.times.10.sup.-4 Pa to grow p-type GaAs 15.

Abstract: This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by intoduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance.

Abstract: Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors.

Abstract: A field-effect transistor or a bipolar transistor may be provided in which the contact resistance between a channel layer or base layer and a contact layer are reduced. For example, an InGaAs buffer layer may be formed on the substrate side of an InGaAs channel layer of a field-effect transistor and by the bypassing effect that carriers pass through this InGaAs buffer layer, the InGaAs channel layer comes in contact with the contact layer with a low resistance. The contact resistance between the InGaAs channel layer and the contact layer can be reduced to 10 ohm per a width of 10.mu.m, and as a result, the value of transconductance factor K of a field-effect transistor can be increased in 14 mA/V.sup.2 per a width of 10.mu.m.

Abstract: This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by introduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance.

Abstract: Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors.

Abstract: A solid film forming apparatus, e.g., an MO-MBE (Metal-Organic Molecular Beam Epitaxy) apparatus, wherein evacuatable containers isolated from a growth chamber by a switching device and connected to raw material gas introduction pipings are provided between the growth chamber for a solid film, e.g., a compound semiconductor, and raw material gas introduction pipings. Growth of the solid film is controlled by opening and closing the switching device and evacuating the container at least while the switching device is closed during the growth of the solid film. An undesired influence on the growing film due to residual gas in the containers which are not used for growth can be prevented and, hence, interception and introduction of the raw material gas into the growth chamber can be performed with remarkably high controllability, and films of superior abruptness of the interface between films, e.g., the heterojunction of the compound semiconductor, can be obtained.

Abstract: A compound semiconductor structure in the form of a superlattice film with effectively graded average composition, comprising an alternating lamination of two kinds of layers of different composition to form pairs of layers, the ratio of the thickness of one layer to the thickness of the other in said pairs of layers being gradually varied in the direction of thickness throughout successive pairs, thereby the average composition being effectively graded throughout the pairs. In a hetero-junction field effect transistor, the layer of effectively graded composition is used between a semiconductor layer making low resistance contact with a current-supplying electrode and a semiconductor layer where a two dimensional channel is to be formed. In case of AlGaAs/GaAs system, the Al composition is varied. When the superlattice film is heat-treated, Al in the AlGaAs layer diffuses into the GaAs layer, yielding a film with actually smoothly graded Al mole fraction.

Abstract: A method of fabricating a rubber double-toothed belt wherein the unvulcanized rubber thereof is firstly heat treated so as to define a first toothed portion of the belt without substantial vulcanization thereof. The preform is then entrained about pulleys and a pair of heated molds engaged with both the toothed portion and the nontoothed outer portion of the belt to place the preform under pressure at a vulcanization temperature for sufficient time to cause the outer rubber portion of the preform to flow outwardly and define the outer teeth of the final belt concurrently with the vulcanization of the double-toothed belt construction. The parameters for controlling the heat treatment to provide the configurational retention without substantial vulcanization of the preform rubber are disclosed.

Abstract: This disclosure is concerned with a method for treating a stainless steel surface by high temperature oxidation. The surface of a stainless steel article is cleaned, TiO.sub.2 and SiO.sub.2 are mixed in microparticles to form a coating agent, and water is added to the mixture to make a slip. The slip is coated on the steel surface to form a coating having a uniform thickness. The coating is dried and the article is subjected to a heat-treatment to form an oxide film. This treatment is performed in an oxidizing atmosphere for a time and a temperature suitable for the color tone to be produced. A desirable temperature for the heat-treatment is between 350.degree. C. to 700.degree. C. When a coating agent is used, it is later removed by washing, etc. after cooling the article.

Abstract: This disclosure is concerned with a method for treating a stainless steel surface by high temperature oxidation. The surface of a stainless steel article is cleaned. TiO.sub.2 and SiO.sub.2 are mixed in microparticles to form a coating agent, and water is added to the mixture to make a slip. The slip is coated on the steel surface to form a coating having a uniform thickness. The coating is dried and the article is subjected to a heat-treatment to form an oxide film. This treatment is performed in an oxidizing atmosphere for a time and a temperature suitable for the color tone to be produced. A desirable temperature for the heat-treatment is between 350.degree. C. to 700.degree. C. When a coating agent is used, it is later removed by washing, etc. after cooling the article.