Patents by Inventor Shigeru Shimada
Shigeru Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020043667Abstract: In a semiconductor integrated circuit device and a method of designing the same, design information about circuit cells each having a desired function are described as objects according to selected purposes. The pieces of design information are registered in a cell library as cell information capable of forming any of substrate potential fixed cells and substrate potential variable cells. Further, a data sheet common to the substrate potential fixed cell and the substrate potential variable cell is offered to a user, so that the user is able to make a selection according to the user's purposes. The substrate potential fixed cells and the substrate potential variable cells are mixed together on a semiconductor chip so as to be properly used according to the functions or the like of circuit portions in which the cells are used.Type: ApplicationFiled: August 28, 2001Publication date: April 18, 2002Inventors: Ryuji Shibata, Shigeru Shimada
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Publication number: 20020024064Abstract: In a semiconductor integrated circuit device and a method of designing the same, design information about circuit cells each having a desired function are described as objects according to selected purposes. The pieces of design information are registered in a cell library as cell information capable of forming any of substrate potential fixed cells and substrate potential variable cells. Further, a data sheet common to the substrate potential fixed cell and the substrate potential variable cell is offered to a user, so that the user is able to make a selection according to the user's purposes. The substrate potential fixed cells and the substrate potential variable cells are mixed together on a semiconductor chip so as to be properly used according to the functions or the like of circuit portions in which the cells are used.Type: ApplicationFiled: September 7, 2001Publication date: February 28, 2002Inventors: Ryuji Shibata, Shigeru Shimada
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Patent number: 6340825Abstract: In a semiconductor integrated circuit device and a method of designing the same, design information about circuit cells each having a desired function are described as objects according to selected purposes. The pieces of design information are registered in a cell library as cell information capable of forming any of substrate potential fixed cells and substrate potential variable cells. Further, a data sheet common to the substrate potential fixed cell and the substrate potential variable cell is offered to a user, so that the user is able to make a selection according to the user's purposes. The substrate potential fixed cells and the substrate potential variable cells are mixed together on a semiconductor chip so as to be properly used according to the functions or the like of circuit portions in which the cells are used.Type: GrantFiled: August 7, 1998Date of Patent: January 22, 2002Assignee: Hitachi, Ltd.Inventors: Ryuji Shibata, Shigeru Shimada
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Patent number: 6295066Abstract: A plurality of rough three-dimensional structured data, each expressing a shape of an object in a polygon pillar, are displayed on a display unit; one rough three-dimensional structured data is selected from the plurality of rough three-dimensional structured data displayed on the display unit in accordance with a request given by an input device; a detailed three-dimensional structured data corresponding to the selected rough three-dimensional structured data is retrieved from a set of detailed three-dimensional structured data which are stored in a storage unit and each of which expresses a shape of an object in detail; and the selected rough three-dimensional structured data is replaced by the corresponding detailed three-dimensional structured data.Type: GrantFiled: September 10, 1998Date of Patent: September 25, 2001Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.Inventors: Masaaki Tanizaki, Kishiko Maruyama, Shigeru Shimada, Nobuya Okayama, Akira Ishii
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Patent number: 5978520Abstract: An object of the present invention is to generate a vector or data from inputted drawing data interactively by suppressing the input cost.When an unknown process occurs in the system during data processing, an inquiry to a user is generated in the case of interactive operation. However, when drawings are handled, the number of inquiries to a user increases and the system operability lowers inversely. The present invention executes the drawing recognition method by cooperation and and competition of a multi-agent on the basis of the basic property of a figure such as adjacent relation. When blurring or a problem portion such as in interruption part or a junction part appears during recognition of a drawing, the linkage relation of line paths is automatically decided by making the recognition agent adjacent to the problem portion cooperate and compete. An inquiry to a user is not made. By doing this, vector data is obtained.The input cost of figure information in a data base can be reduced remarkably.Type: GrantFiled: July 29, 1996Date of Patent: November 2, 1999Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., LtdInventors: Kishiko Maruyama, Shigeru Shimada, Yoshinori Takahara, Atsushi Matsumoto, Kazuhiro Hiraki
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Patent number: 5510437Abstract: There is disclosed a method for producing organoplatinum polymers by reacting 5,6,11,12-tetradehydrodibenzo a,e!cyclooctenes with platinum complexes. The organoplatinum polymer thus obtained has .pi.-coordinated acetylene in the main chain, and is expected to be used as electronic materials, nonlinear optical materials, and polymer platinum complex catalysts, that can be used in air.Type: GrantFiled: March 2, 1995Date of Patent: April 23, 1996Assignee: Director-General of Agency of Industrial Science and TechnologyInventors: Shigeru Shimada, Masato Tanaka
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Patent number: 5502152Abstract: Disclosed is a polyoxyalkylene derivative which is useful for a carboxyl group-containing polyurethane resin, can easily introduce a carboxyl group into a polyurethane resin skeleton, and has a low melting point or is in a liquid state at normal temperature. The polyoxyalkylene derivative is represented by formula (I): ##STR1## wherein R.sub.1 represents a hydrogen atom or an alkyl group having from 1 to 3 carbon atoms; R.sub.2 represents an alkylene group having from 1 to 6 carbon atoms or an arylene group having from 6 to 8 carbon atoms; A represents an alkylene group having from 4 to 7 carbon atoms; B represents an alkylene group having from 2 to 6 carbon atoms; l represents from 0 to 2; m represents from 0.1 to 35; n represents from 0.1 to 50; and 0.5<(m+n)<50.Type: GrantFiled: January 13, 1995Date of Patent: March 26, 1996Assignee: Hodogaya Chemical Co., Ltd.Inventors: Shigeru Shimada, Susumu Jinbo, Hideyuki Isii
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Patent number: 5490095Abstract: In extracting parameters for use in circuit simulation of an IC device having a plurality of insulated gate field-effect transistors (IGFETs), layout data for patterns for the IC device are prepared. The patterns include gate patterns for the IGFETs, at least one of which is a bent gate pattern such that drain and source regions are defined on opposite sides of the bent gate pattern. An index symbol data is added to the layout data, which is for the bent gate pattern, to thereby form designed pattern data. For higher accuracy of the circuit simulation, the index symbol data in the designed pattern data is detected and used to produce parameters concerning the gate patterns for the IGFETs, thereby contributing to determination of a capability of controlling electric current in the IGFETs.Type: GrantFiled: January 19, 1993Date of Patent: February 6, 1996Assignees: Hitachi, Ltd., VLSI Technology IncorporatedInventors: Shigeru Shimada, Michael Saniei, Balaji Krishnamachary
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Patent number: 5467444Abstract: In a system for displaying map information, an object base storage unit stores an object base relating to relational objects, a map data base storage unit stores a map data base relating to figure elements of map data, and an attribute data base storage unit stores an attribute data base relating to attribute data related to the figure elements of the map data. In response to an input command, a head one of the relational objects is retrieved from the object base, and entity objects are desired from a head relational object by referring to the object base, so that each of the desired entity objects is processed. The map data retrieving section retrieves the map data from the map data base in response to the processing of each map data entity object of the derived entity objects, and the attribute data retrieving section retrieves the attribute data from the attribute data base in response to the execution of each of attribute data entity objects of the derived entity objects.Type: GrantFiled: November 7, 1991Date of Patent: November 14, 1995Assignees: Hitachi, Ltd., Ltd. Hitachi Engineering & Services CoInventors: Fumio Kawamura, Shigeru Shimada, Tsutomu Ikeda
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Patent number: 5449800Abstract: There is disclosed a method for effectively producing a silicon-containing pentacyclic compound, wherein the method comprises reacting (a) a 1,2-bis(hydrosilyl)benzene with (b) a cyclic diyne in the presence of (c) a platinum compound. There is also disclosed a method for effectively producing a silicon-containing ladder polymer having a complete ladder structure, wherein the method comprises reacting (a) a 1,2,4,5-tetrakis(hydrosilyl)benzene with (b) a cyclic diyne in the presence of (c) a platinum compound.Type: GrantFiled: December 27, 1994Date of Patent: September 12, 1995Assignee: Director-General of Agency of Industrial Science and TechnologyInventors: Shigeru Shimada, Yuko Uchimaru, Masato Tanaka
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Patent number: 5448696Abstract: A method for displaying information and system includes the steps of displacing map data on the screen of a display unit, displaying layout data representing one or more segments of a certain floor in each of the one or more structure elements of the map data displayed on a first designated portion, on a second designated portion of the screen in response to a layout display instruction, and displaying attribute data corresponding to each of the one or more segments of the floor.Type: GrantFiled: December 27, 1993Date of Patent: September 5, 1995Assignees: Hitachi, Ltd., The Tokyo Electric Power Co., Inc.Inventors: Shigeru Shimada, Fumio Kawamura, Kazuyuki Suzuki, Nobuyuki Chikada, Shirou Takei
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Patent number: 5348902Abstract: In a method of designing cells applicable to different first and second design automation systems, first and second cells circuit-designed by the first and second design automation systems, respectively, are demarcated into a logic function portion and an input/output portion. A plurality of sets of common lithography patterns for the logic function portions of the first and second cells are determined such that each common lithography pattern set is shared by those of the first and second cells which have same logic function in the first and second design automation systems. A first set of lithography patterns for the input/output portions of the first cells in the first design automation system and a second set of lithography patterns for the input/output portions of the second cells in the second design automation system are determined, respectively.Type: GrantFiled: January 19, 1993Date of Patent: September 20, 1994Assignees: Hitachi, Ltd., VSLI Technology IncorporatedInventors: Shigeru Shimada, Ryuji Shibata, Atsushi Kurosawa
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Patent number: 5278946Abstract: Multimedia data in an object structure include entity objects and relation objects, wherein each entity object has data representing a media element as internal data, and each relation object represents a relation between the entity objects. A relation object is searched according to information specified by a search command, and a searched relation object and internal data of an entity object related thereto are displayed on the screen of a display unit as a set of display elements. To generate a digest of the multimedia data, a matching between a structure portion of a user model and a structure portion of a system model is examined. The user model is generated according to a request of the user and arranged in layers, while the system model has been previously generated. The multimedia data are arranged in layers according to the importance of respective data elements constituting the multimedia data.Type: GrantFiled: November 29, 1990Date of Patent: January 11, 1994Assignee: Hitachi, Ltd.Inventors: Shigeru Shimada, Hitoshi Matsushima, Seiji Kashioka, Akiko Sugihara
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Patent number: 5210868Abstract: In a database system for map information, matching and retrieving operations are carried out between an attribute database associated with a business and a map database. A matching key word is separated into a common noun part and a proper noun part, a synonym and an abbreviated word are inferred by employing rules respectively. Furthermore, a candidate key word is inferred by employment of a rule for combining these results at an optimum state, whereby a matching process is performed. Another address database is employed so as to realize a mutual retrieving operation even when the attribute database is not matched with the map database.Type: GrantFiled: December 19, 1990Date of Patent: May 11, 1993Assignees: Hitachi Ltd., The Tokyo Electric Power Co., Inc.Inventors: Shigeru Shimada, Kazuyuki Suzuki, Naoki Yamamoto, Nobuyuki Chikada, Sirou Takei
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Patent number: 5109492Abstract: A microprocessor suitable for a high speed processor system prevents extension of a bus cycle due to delay of generation of a bus cycle end signal and effectively utilizes a characteristic of a high speed accessable external device.Type: GrantFiled: August 13, 1987Date of Patent: April 28, 1992Assignee: Hitachi, Ltd.Inventors: Kouki Noguchi, Yoshimune Hagiwara, Kazuhiko Iwasaki, Hirokazu Aoki, Shigeru Shimada
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Patent number: 4946729Abstract: A back coating resin composition for a magnetic recording medium comprising:(A) a plastic compound having a molecular weight of from 5,000 to 100,000 and containing at least two radiation-curable unsaturated double bonds;(B) a rubber-like compound having a molecular weight of from 3,000 to 100,000 and containing at least one radiation-curable unsaturated double bond or containing no such double bond; and(C) a compound having a molecular weight of from 200 to 3,000 and containing at least one radiation-curable unsaturated double bond.Type: GrantFiled: September 26, 1984Date of Patent: August 7, 1990Assignee: TDK CorporationInventors: Masaharu Nishimatsu, Shigeru Shimada, Toshiaki Ide, Hiroyuki Arioka, Yuichi Kubota
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Patent number: 4896300Abstract: A semiconductor memory includes a word line driving circuit whose output terminal is coupled to one end of each word line of a memory array, and also an auxiliary driving circuit which drives the other end of the word line upon receiving a selection signal transmitted to the other end of this word line. The auxiliary driving circuit comprises a level detector circuit which is dynamically driven by a timing signal, and a driving element which is driven by an output of the level detector circuit to drive the other end of the word line. When the word line is to be reset, the output of the level detector circuit is set at a level which brings the driving element into an "off" state. The auxiliary driving circuit of this arrangement permits the other end of the word line to change to a selection level quickly and to be reset quickly.Type: GrantFiled: November 25, 1987Date of Patent: January 23, 1990Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering, Ltd.Inventors: Yutaka Shinagawa, Shigeru Shimada
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Patent number: 4847788Abstract: A drawing processing system includes file storage equipment for storing drawing data in the form of pages through division of the drawing data, a memory for storing coordinate correcting values for managing pages in a continuated manner, and a temporary memory for storing page data for executing drawing edition processing. The drawing data are transferred from the file storage equipment to the temporary memory in a continuated manner, while the coordinate correcting values being added thereto. A joined drawing is prepared by combining together the pages along the boundaries thereof on the basis of the drawing data as transferred and by erasing the boundaries between the connected pages. Graphic edition processings such as displacement, joining, separation or the like can be then performed in the joined drawing.Type: GrantFiled: February 12, 1986Date of Patent: July 11, 1989Assignee: Hitachi, Ltd.Inventor: Shigeru Shimada
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Patent number: 4811244Abstract: A domain covering a drawing data subjected to information processing is determined and equally divided into meshes of predetermined smallest size. For each of vectors constituting a drawing data subjected to the processing, the number of the meshes traversed by the vector is counted. When the number of the meshes traversed by a given one of the vectors exceeds a predetermined value, the domain is equally divided into meshes of a larger mesh size and the number of the updated meshes traversed by the given one vector is counted. By repeating this operation, all the vectors are stored in a memory as the drawing information in terms of the mesh size and the coordinates of the meshes traversed by vector. Since the number of the meshes traversed by the vector thus can not exceed the predetermined value, the speeding-up of the drawing information processing can be accomplished. A predetermined value may be provided for the mesh size, if desired.Type: GrantFiled: September 25, 1987Date of Patent: March 7, 1989Assignee: Hitachi, Ltd.Inventors: Shigeru Shimada, Akimitsu Kondoh, Atsuo Miyazaki
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Patent number: 4782037Abstract: Herein disclosed is a process of fabricating a semiconductor integrated circuit device, in which there is formed between a conductive layer prepared by covering a polycrystalline silicon layer with either a layer containing a refractory metal of high melting point, i.e., a refractory metal layer or a silicide layer of the refractory metal and a first insulating film made of phosphosilicate glass flowing over said conductive layer containing the refractory metal, a second insulating film preventing the layer containing a refractory metal from peeling from the polycrystalline silicon layer by the glass flow. The second insulating film is formed by deposition to have a thickness not smaller than a predetermined value.Type: GrantFiled: October 30, 1986Date of Patent: November 1, 1988Assignees: Hatachi, Ltd, Hitachi Microcomputer Engineering Ltd.Inventors: Akihiro Tomozawa, Yoku Kaino, Shigeru Shimada, Nozomi Horino, Yoshiaki Yoshiura, Osamu Tsuchiya, Shozo Hosoda