Patents by Inventor Shigeru Sugino

Shigeru Sugino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10863629
    Abstract: A method of manufacturing a through hole of a substrate includes forming, to the substrate, a cutting hole surrounding a removal-target-part such that a connection part of the substrate remains, the connection part that connects the removal-target-part that is removed from the substrate and a remaining part other than the removal-target-part that has been removed, along a cutting line of the through hole formed to the substrate; applying plating on an area including an inner peripheral wall face of the cutting hole of the substrate; applying a film covering an opening of the cutting hole on a surface of the substrate applied with the plating and performing exposure and development of the film to form an etching resist covering an area including the opening of the cutting hole; performing etching of the plating applied on the substrate; removing the etching resist; and cutting the connection part to remove the removal-target-part.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: December 8, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Kiyoyuki Hatanaka, Shigeru Sugino, Takahiro Kitagawa, Ryo Kanai, Nobuo Taketomi, Mitsunori Abe
  • Patent number: 10624216
    Abstract: A wiring board includes, a base plate that has a first surface, a second surface opposite to the first surface, and a side surface coupled to the first surface and the second surface, a conductor provided on the side surface, and a protrusion provided over the side surface. The protrusion partitions the conductor into a first portion on the side surface that extends to the first surface and a second portion on the side surface that extends to the second surface. The protrusion has a solder wettability lower than the conductor and protrudes from the conductor.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: April 14, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Nobuo Taketomi, Takahiro Kitagawa, Mitsunori Abe, Shigeru Sugino, Kiyoyuki Hatanaka, Shigeo Iriguchi, Ryo Kanai
  • Patent number: 10605851
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: March 31, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Naoki Nakamura, Shigeru Sugino, Takahide Mukoyama, Ryo Kanai, Nobuo Taketomi, Kiyoyuki Hatanaka
  • Publication number: 20200037452
    Abstract: A method of manufacturing a through hole of a substrate includes forming, to the substrate, a cutting hole surrounding a removal-target-part such that a connection part of the substrate remains, the connection part that connects the removal-target-part that is removed from the substrate and a remaining part other than the removal-target-part that has been removed, along a cutting line of the through hole formed to the substrate; applying plating on an area including an inner peripheral wall face of the cutting hole of the substrate; applying a film covering an opening of the cutting hole on a surface of the substrate applied with the plating and performing exposure and development of the film to form an etching resist covering an area including the opening of the cutting hole; performing etching of the plating applied on the substrate; removing the etching resist; and cutting the connection part to remove the removal-target-part.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 30, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Kiyoyuki Hatanaka, Shigeru Sugino, Takahiro Kitagawa, Ryo Kanai, Nobuo Taketomi, Mitsunori Abe
  • Patent number: 10393797
    Abstract: A method for inspecting a laminated board, includes: performing a reflow process to solder an electronic component to a surface of a laminated board in which at least one of a plurality of wiring layers which are laminated with each other is coupled to another adjacent wiring layer via a via; and inspecting, in the reflow process, a conduction state of the via after a temperature of the laminated board reaches a melting point of a solder, and when the temperature of the laminated board is at a temperature range lower than the melting point and higher than room temperature.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: August 27, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Takahiro Kitagawa, Shigeo Iriguchi, Kiyoyuki Hatanaka, Shigeru Sugino, Ryo Kanai
  • Patent number: 10342129
    Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: July 2, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Takahiro Kitagawa, Mitsunori Abe, Shigeru Sugino, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Publication number: 20190110365
    Abstract: A wiring board includes, a base plate that has a first surface, a second surface opposite to the first surface, and a side surface coupled to the first surface and the second surface, a conductor provided on the side surface, and a protrusion provided over the side surface. The protrusion partitions the conductor into a first portion on the side surface that extends to the first surface and a second portion on the side surface that extends to the second surface. The protrusion has a solder wettability lower than the conductor and protrudes from the conductor.
    Type: Application
    Filed: October 3, 2018
    Publication date: April 11, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Nobuo Taketomi, Takahiro KITAGAWA, Mitsunori Abe, Shigeru SUGINO, Kiyoyuki Hatanaka, Shigeo Iriguchi, Ryo Kanai
  • Publication number: 20180310405
    Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.
    Type: Application
    Filed: April 5, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Takahiro KITAGAWA, Mitsunori Abe, Shigeru SUGINO, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Publication number: 20180059170
    Abstract: A method for inspecting a laminated board, includes: performing a reflow process to solder an electronic component to a surface of a laminated board in which at least one of a plurality of wiring layers which are laminated with each other is coupled to another adjacent wiring layer via a via; and inspecting, in the reflow process, a conduction state of the via after a temperature of the laminated board reaches a melting point of a solder, and when the temperature of the laminated board is at a temperature range lower than the melting point and higher than room temperature.
    Type: Application
    Filed: June 15, 2017
    Publication date: March 1, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Mitsunori ABE, Takahiro Kitagawa, Shigeo Iriguchi, Kiyoyuki Hatanaka, Shigeru Sugino, Ryo Kanai
  • Publication number: 20170285096
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Application
    Filed: June 16, 2017
    Publication date: October 5, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo IRIGUCHI, Naoki NAKAMURA, Shigeru SUGINO, Takahide MUKOYAMA, Ryo KANAI, Nobuo TAKETOMI, Kiyoyuki HATANAKA
  • Patent number: 9709619
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: July 18, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Naoki Nakamura, Shigeru Sugino, Takahide Mukoyama, Ryo Kanai, Nobuo Taketomi, Kiyoyuki Hatanaka
  • Patent number: 9295155
    Abstract: A flexible printed board includes a base material, first conductive pads arranged along an imaginary line on the base material and extending with a first width from front end to rear end on a front side of the imaginary line, second conductive pads arranged along the imaginary line and extending with a second width from front end on a rear side of the imaginary line to rear end, first wiring patterns provided between the second conductive pads, and extending with a third width to front end connected to the rear ends of the first conductive pads, and a reinforcing layer for reinforcing a reinforcing area over the first conductive pads and the first wiring patterns, and having a front edge on a front side of rear ends of the first conductive pads and a rear edge on a rear side of the rear ends of the second conductive pads.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 22, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Naoki Nakamura, Shigeru Sugino, Nobuo Taketomi, Ryo Kanai
  • Publication number: 20140077834
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Application
    Filed: July 15, 2013
    Publication date: March 20, 2014
    Inventors: Shigeo IRIGUCHI, Naoki NAKAMURA, Shigeru SUGINO, Takahide MUKOYAMA, Ryo KANAI, Nobuo TAKETOMI, Kiyoyuki HATANAKA
  • Publication number: 20120312586
    Abstract: A flexible printed board includes a base material, first conductive pads arranged along an imaginary line on the base material and extending with a first width from front end to rear end on a front side of the imaginary line, second conductive pads arranged along the imaginary line and extending with a second width from front end on a rear side of the imaginary line to rear end, first wiring patterns provided between the second conductive pads, and extending with a third width to front end connected to the rear ends of the first conductive pads, and a reinforcing layer for reinforcing a reinforcing area over the first conductive pads and the first wiring patterns, and having a front edge on a front side of rear ends of the first conductive pads and a rear edge on a rear side of the rear ends of the second conductive pads.
    Type: Application
    Filed: August 21, 2012
    Publication date: December 13, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Naoki Nakamura, Shigeru Sugino, Nobuo Taketomi, Ryo Kanai
  • Patent number: 8305767
    Abstract: Terminal pads are arranged on a first surface of the substrate for an electronic component to receive terminals of the electronic component. An electrically-conductive film is formed on a second surface defined on the back of the first surface over the back of a mounting area for the electronic component. The mounting area is contoured along the outer periphery of the arrangement of the terminal pads. The ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the back of the mounting area is set appropriate to the ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the mounting area for each electronic component. This results in suppression of flexure of the printed wiring board during reflow.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: November 6, 2012
    Assignee: Fujitsu Limited
    Inventors: Naoki Nakamura, Shigeru Sugino, Ryo Kanai
  • Patent number: 8269114
    Abstract: A flexible printed board includes a base material, first conductive pads arranged along an imaginary line on the base material and extending with a first width from front end to rear end on a front side of the imaginary line, second conductive pads arranged along the imaginary line and extending with a second width from front end on a rear side of the imaginary line to rear end, first wiring patterns provided between the second conductive pads, and extending with a third width to front end connected to the rear ends of the first conductive pads, and a reinforcing layer for reinforcing a reinforcing area over the first conductive pads and the first wiring patterns, and having a front edge on a front side of rear ends of the first conductive pads and a rear edge on a rear side of the rear ends of the second conductive pads.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Limited
    Inventors: Naoki Nakamura, Shigeru Sugino, Nobuo Taketomi, Ryo Kanai
  • Patent number: 8233286
    Abstract: Terminal pads are arranged on a first surface of the substrate for an electronic component to receive terminals of the electronic component. An electrically-conductive film is formed on a second surface defined on the back of the first surface over the back of a mounting area for the electronic component. The mounting area is contoured along the outer periphery of the arrangement of the terminal pads. The ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the back of the mounting area is set appropriate to the ratio of the area of the electrically-conductive material to the area of the surface of the substrate over the mounting area for each electronic component. This results in suppression of flexure of the printed wiring board during reflow.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Limited
    Inventors: Naoki Nakamura, Shigeru Sugino, Ryo Kanai
  • Publication number: 20110286188
    Abstract: A multilayer printed circuit board includes an interior interconnect layer, and a semiconductor package including a flexible interconnect structure whose distal end is a free end, wherein the flexible interconnect structure and the interior interconnect layer are electrically connected to each other.
    Type: Application
    Filed: March 15, 2011
    Publication date: November 24, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Ryo KANAI, Shunichi KIKUCHI, Naoki NAKAMURA, Shigeru SUGINO, Kiyoyuki HATANAKA, Nobuo TAKETOMI
  • Patent number: 8035978
    Abstract: A printed circuit board includes a mounted a first electronic component. The printed circuit board includes a first through holes extending from a mounting surface on which the electronic component is mounted. The printed circuit board includes a second through holes extending from a surface opposite the mounting surface and aligned with the first through holes. A second electronic component may be longitudinally between the first through holes and the second through holes. The first and second through holes may be electrically connected with the second electronic component.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: October 11, 2011
    Assignee: Fujitsu Limited
    Inventor: Shigeru Sugino
  • Publication number: 20110132654
    Abstract: A method for manufacturing a multilayer printed circuit board, and a printed circuit board manufactured according to the method, includes laterally-aligning a first inner substrate in which first insulation layers and first conductor layers are alternately laminated and a second inner substrate in which second insulation layers and second conductor layers are alternately laminated. The second inner substrate has a lager number of layers than the first inner substrate. The laterally-aligned first inner substrate and second inner substrate are placed between a pair of third insulation layers in a thickness direction. The pair of the third insulation layer are heated under pressure in the thickness direction. A conductor pattern is formed on surfaces of the pair of the third insulation layers.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 9, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Nobuo TAKETOMI, Shunichi KIKUCHI, Naoki NAKAMURA, Kiyoyuki HATANAKA, Shigeru SUGINO, Ryo KANAI