Patents by Inventor Shigeru Yamane

Shigeru Yamane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11945882
    Abstract: Crystals of the compound represented by formula (1), a method for the production thereof, and a method for producing an antibody-drug conjugate using the crystals.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: April 2, 2024
    Assignee: DAIICHI SANKYO COMPANY, LIMITED
    Inventors: Tatsuya Yamaguchi, Takashi Kouko, Shigeru Noguchi, Yohei Yamane, Fumikatsu Kondo, Takahiro Aoki, Tadahiro Takeda, Kohei Sakanishi, Hitoshi Sato, Tsuyoshi Ueda, Shinji Matuura, Kei Kurahashi, Yutaka Kitagawa, Tatsuya Nakamura
  • Patent number: 10962702
    Abstract: An input device includes: a light source that emits light; a first sheet including a design portion; a second sheet having a conductive pattern on which the light source is mounted and in which a touch sensor electrode is disposed in a position different from the light source; a body that is sandwiched between the first sheet and the second sheet to be integral therewith, and transmits the light emitted by the light source; and a guide disposed in a light path from the light source to the design portion, the guide guiding light transmitting through an inside of the body toward the design portion and being distinguished from the body. The light source and the light guide are disposed along a surface of the second sheet on a side facing the body. The body is integral with the light source and the light guide and encapsulates them.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: March 30, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shigeru Yamane, Hideaki Eto, Wahei Agemizu, Masahiro Kasano, Go Nakatani, Hiroshi Morioka
  • Publication number: 20200110212
    Abstract: An input device includes: a light source that emits light; a first sheet including a design portion; a second sheet having a conductive pattern on which the light source is mounted and in which a touch sensor electrode is disposed in a position different from the light source; a body that is sandwiched between the first sheet and the second sheet to be integral therewith, and transmits the light emitted by the light source; and a guide disposed in a light path from the light source to the design portion, the guide guiding light transmitting through an inside of the body toward the design portion and being distinguished from the body. The light source and the light guide are disposed along a surface of the second sheet on a side facing the body. The body is integral with the light source and the light guide and encapsulates them.
    Type: Application
    Filed: October 2, 2019
    Publication date: April 9, 2020
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Shigeru YAMANE, Hideaki ETO, Wahei AGEMIZU, Masahiro KASANO, Go NAKATANI, Hiroshi MORIOKA
  • Patent number: 7754321
    Abstract: A manufacturing method of a clad board includes: sticking a releasing film to a pre-preg sheet; forming a non-through-hole or through-hole in the pre-preg sheet including the releasing film; filling the hole with conductive paste; peeling off the film; and heating and pressing a metal foil onto the pre-preg sheet. The clad board has a smooth face formed on one face or both the faces of the pre-preg sheet, so that the conductive paste is restrained from spreading in an interface between the pre-preg sheet and the releasing film. This structure can avoid short-circuit between circuits and prevent insulating reliability from lowering. As a result, an yield rate is improved, and a reliable circuit board is obtainable.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: July 13, 2010
    Assignee: Panasonic Corporation
    Inventors: Shigeru Yamane, Eiji Kawamoto, Hideaki Komoda, Takeshi Suzuki, Toshihiro Nishii, Shinji Nakamura
  • Patent number: 6993836
    Abstract: A circuit board having stable connection resistance can be obtained. The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: February 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20050249933
    Abstract: A manufacturing method of a clad board includes: sticking a releasing film to a pre-preg sheet; forming a non-through-hole or through-hole in the pre-preg sheet including the releasing film; filling the hole with conductive paste; peeling off the film; and heating and pressing a metal foil onto the pre-preg sheet. The clad board has a smooth face formed on one face or both the faces of the pre-preg sheet, so that the conductive paste is restrained from spreading in an interface between the pre-preg sheet and the releasing film. This structure can avoid short-circuit between circuits and prevent insulating reliability from lowering. As a result, an yield rate is improved, and a reliable circuit board is obtainable.
    Type: Application
    Filed: September 11, 2003
    Publication date: November 10, 2005
    Inventors: Shigeru Yamane, Eiji Kawamoto, Hideaki Komoda, Takeshi Suzuki, Toshihiro Nishii, Shinji Nakamura
  • Patent number: 6890449
    Abstract: A method of manufacturing a PCB comprising the steps of: forming through-holes in a substrate having releasing layers on front and back faces; filling conductive paste in the through-holes; removing the releasing layers and disposing metal foil on both faces of the substrate; and heat pressing them. A diameter of the through-holes is larger than that of corresponding holes formed on the releasing layers. According to the present invention, when the conductive paste is compressed, conductive paste protruding from the surface of the substrate is trapped at the edges of the through-holes. This configuration prevents short circuits with undesirable wiring patterns. So, an enough amount of the conductive paste can protrude from the surface of the substrate. Therefore, after the compression, stable electric connections inside the conductive paste and between the conductive paste and the metal foils are ensured, thus PCBs with superior reliability can be produced.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: May 10, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka, Toshihiro Nishii
  • Patent number: 6838164
    Abstract: A method for manufacturing a printed wiring board, comprising the step of forming a hole by an energy beam such as a laser beam, wherein formation of a resin film by a substrate-material resin oozing to the inner-wall surface of a hole is prevented, by lowering the water-absorption percentage of a substrate material through the dehumidifying step as the preprocess of the hole-forming step for forming a through-hole or non-through-hole for interconnecting circuits formed on both sides or in multiple layers, thereby it is possible to realize high-quality hole-formation by preventing a defective resin film formation and obtain a high-reliability printed wiring board.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: January 4, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeru Yamane, Toshihiro Nishii, Shinji Nakamura, Masayuki Sakai
  • Patent number: 6833042
    Abstract: A manufacturing method of a clad board includes: sticking a releasing film to a pre-preg sheet; forming a non-through-hole or through-hole in the pre-preg sheet including the releasing film; filling the hole with conductive paste; peeling off the film; and heating and pressing a metal foil onto the pre-preg sheet. The clad board has a smooth face formed on one face or both the faces of the pre-preg sheet, so that the conductive paste is restrained from spreading in an interface between the pre-preg sheet and the releasing film. This structure can avoid short-circuit between circuits and prevent insulating reliability from lowering. As a result, an yield rate is improved, and a reliable circuit board is obtainable.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: December 21, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeru Yamane, Eiji Kawamoto, Hideaki Komoda, Takeshi Suzuki, Toshihiro Nishii, Shinji Nakamura
  • Patent number: 6814836
    Abstract: A method for manufacturing a printed wiring board, comprising the step of forming a hole by an energy beam such as a laser beam, wherein formation of a resin film by a substrate-material resin oozing to the inner-wall surface of a hole is prevented, by lowering the water-absorption percentage of a substrate material through the dehumidifying step as the preprocess of the hole-forming step for forming a through-hole or non-through-hole for interconnecting circuits formed on both sides or in multiple layers, thereby it is possible to realize high-quality hole-formation by preventing a defective resin film formation and obtain a high-reliability printed wiring board.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: November 9, 2004
    Assignee: Matsushita Electric Industrial, Co., Ltd.
    Inventors: Shigeru Yamane, Toshihiro Nishii, Shinji Nakamura, Masayuki Sakai
  • Patent number: 6700071
    Abstract: A circuit board having stable connection resistance can be obtained . The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: March 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20040035604
    Abstract: A circuit board having stable connection resistance can be obtained. The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Application
    Filed: August 27, 2003
    Publication date: February 26, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20040020046
    Abstract: The present invention provides a method for manufacturing a conductive paste. The method includes deforming conductive particles so that a deformation degree is 1.01 to 1.5 by application of a stress to the conductive particles and mixing the deformed conductive particles with a binder that includes a thermosetting resin as the main component. The deformation degree is determined by dividing an average diameter of the conductive particles after deformation by an average diameter of the conductive particles before deformation, where the average diameter is measured by a laser diffraction method. The use of this conductive paste for a prepreg sheet having limited compressibility can suppress a short circuit between via holes and the degradation of insulation properties.
    Type: Application
    Filed: June 6, 2003
    Publication date: February 5, 2004
    Inventors: Takeshi Suzuki, Satoru Tomekawa, Yosihiro Tomita, Yuichiro Sugita, Shigeru Yamane
  • Patent number: 6671951
    Abstract: In manufacturing a double-layered or a multi-layered printed wiring board, a layer of metamorphic substance, which is created by transmuting a substrate material, is formed on an inner wall of a hole during a perforation process of the substrate utilizing radiation energy. The layer of metamorphic substance prevents conductive materials constituting electrical connection means formed on the inner wall of the hole from dispersing over a surface of the substrate or permeating into the substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: January 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hidenori Hayashi, Toru Fujimoto, Toshiharu Okada, Izuru Nakai
  • Publication number: 20030091787
    Abstract: A manufacturing method of a clad board includes: sticking a releasing film to a pre-preg sheet; forming a non-through-hole or through-hole in the pre-preg sheet including the releasing film; filling the hole with conductive paste; peeling off the film; and heating and pressing a metal foil onto the pre-preg sheet. The clad board has a smooth face formed on one face or both the faces of the pre-preg sheet, so that the conductive paste is restrained from spreading in an interface between the pre-preg sheet and the releasing film. This structure can avoid short-circuit between circuits and prevent insulating reliability from lowering. As a result, an yield rate is improved, and a reliable circuit board is obtainable.
    Type: Application
    Filed: October 9, 2002
    Publication date: May 15, 2003
    Inventors: Shigeru Yamane, Eiji Kawamoto, Hideaki Komoda, Takeshi Suzuki, Toshihiro Nishii, Shinji Nakamura
  • Patent number: 6528733
    Abstract: An inner layer circuit board with a convex inner layer circuit pattern having a predetermined thickness, a prepreg sheet having conductive material disposed in a plurality of through-holes and metallic foil are laminated to a substrate, and the laminated board is heated under pressures. After that, a laminated circuit pattern is formed by machining the metallic foil. In such multi-layer circuit board, a smoothing layer is disposed on a concave portion where no inner layer circuit pattern of the inner layer circuit board is formed. In this way, the conductive materials disposed in a plurality of through-holes are uniformly compressed. As a result, the connection resistance between the inner circuit pattern and the laminated circuit pattern becomes stabilized.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: March 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Patent number: 6523258
    Abstract: A method of performing a printed circuit board including the steps of: (a) disposing a first release film on the surface of a substrate and a second release film on the back of the substrate; (b) forming a through-hole in the first release film, the second release film, and the substrate; (c) filling conductive paste into a through-hole; (d) removing the first release film and the second release film from the substrate with the through-hole filled with the conductive paste; (e) placing a first metallic member on the surface of the substrate with the release films removed and placing a second metallic member on the back of the substrate; (f) compressing under heat the substrate with the first metallic member and the second metallic member disposed thereon; and (g) forming a desired circuit pattern on the first metallic member and the second metallic member.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: February 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka
  • Patent number: 6518515
    Abstract: In manufacturing a double-layered or a multi-layered printed wiring board, a layer of metamorphic substance, which is created by transmuting a substrate material, is formed on an inner wall of a hole during a perforation process of the substrate utilizing radiation energy. The layer of metamorphic substance prevents conductive materials constituting electrical connection formed on the inner wall of the hole from dispersing over a surface of the substrate or permeating into the substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: February 11, 2003
    Assignee: Matsushita Electric Industrial Co, Ltd.
    Inventors: Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hidenori Hayashi, Toru Fujimoto, Toshiharu Okada, Izuru Nakai
  • Publication number: 20020189856
    Abstract: A circuit board having stable connection resistance can be obtained . The multi-layer circuit board includes the steps of making through-holes in a incompressible substrate having films on either side thereof via a bonding layer; filling conductive paste into the through-holes; removing the films from the substrate; laminating metallic foils to either side of the substrate and heating same under pressures to harden the bonding layer, bonding the metallic foils to the substrate and electrically connecting the sides of the substrate to each other; and forming a circuit pattern by machining the metallic foils.
    Type: Application
    Filed: August 14, 2001
    Publication date: December 19, 2002
    Inventors: Toshiaki Takenaka, Toshihiro Nishii, Shigeru Yamane, Shinji Nakamura, Hideaki Komoda, Kunio Kishimoto
  • Publication number: 20020170876
    Abstract: A method of manufacturing a PCB comprising the steps of: forming through-holes in a substrate having releasing layers on front and back faces; filling conductive paste in the through-holes; removing the releasing layers and disposing metal foil on both faces of the substrate; and heat pressing them. A diameter of the through-holes is larger than that of corresponding holes formed on the releasing layers. According to the present invention, when the conductive paste is compressed, conductive paste protruding from the surface of the substrate is trapped at the edges of the through-holes. This configuration prevents short circuits with undesirable wiring patterns. So, an enough amount of the conductive paste can protrude from the surface of the substrate. Therefore, after the compression, stable electric connections inside the conductive paste and between the conductive paste and the metal foils are ensured, thus PCBs with superior reliability can be produced.
    Type: Application
    Filed: June 7, 2002
    Publication date: November 21, 2002
    Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka, Toshihiro Nishii