Patents by Inventor Shigeya Kimura

Shigeya Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9263632
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: February 16, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeya Kimura, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20160005927
    Abstract: A semiconductor light emitting element includes a metal layer, a first semiconductor layer of a first conductivity type, a light emitting layer, a second semiconductor layer of a second conductivity type, a first electrode, a second electrode, and an insulating layer. The first semiconductor layer is separated from the metal layer in a first direction. The first semiconductor layer includes a first region, a second region, and a third region. The light emitting layer has a first side surface intersecting a second direction. The second semiconductor layer has a second side surface intersecting the second direction. The first electrode is electrically connected to the first region and the metal layer. The second electrode includes a first portion, and a second portion being continuous with the first portion. The insulating layer includes a first insulating portion and a second insulating portion.
    Type: Application
    Filed: April 23, 2015
    Publication date: January 7, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenjiro UESUGI, Jumpei TAJIMA, Hiroshi ONO, Toshihide ITO, Shigeya KIMURA, Shinya NUNOUE
  • Patent number: 9231160
    Abstract: A semiconductor light emitting element includes a metal layer, a first semiconductor layer of a first conductivity type, a light emitting layer, a second semiconductor layer of a second conductivity type, a first electrode, a second electrode, and an insulating layer. The first semiconductor layer is separated from the metal layer in a first direction. The first semiconductor layer includes a first region, a second region, and a third region. The light emitting layer has a first side surface intersecting a second direction. The second semiconductor layer has a second side surface intersecting the second direction. The first electrode is electrically connected to the first region and the metal layer. The second electrode includes a first portion, and a second portion being continuous with the first portion. The insulating layer includes a first insulating portion and a second insulating portion.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: January 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenjiro Uesugi, Jumpei Tajima, Hiroshi Ono, Toshihide Ito, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20150357523
    Abstract: A semiconductor light emitting element includes a first substrate, a stacked body, an electrode, and a conductive layer. The first substrate has a first face and a first side face. The first side face intersects the first face. The first substrate includes a plurality of conductive portions and a plurality of insulating portions arranged alternately. The stacked body is aligned with the first substrate. The stacked body includes first and second semiconductor layers and a light emitting layer. The electrode is electrically connected to the first semiconductor layer. The conductive layer is electrically connected to at least one of the conductive portions and the second semiconductor layer. At least one of the insulating portions is disposed between the first side face and a portion of the conductive layer nearest to the first side face.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jumpei TAJIMA, Shigeya KIMURA, Hiroshi ONO, Naoharu SUGIYAMA, Shinya NUNOUE
  • Publication number: 20150349199
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×108 cm?2. The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.
    Type: Application
    Filed: August 12, 2015
    Publication date: December 3, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi TACHIBANA, Shigeya KIMURA, Hajime NAGO, Shinya NUNOUE
  • Patent number: 9202994
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Rei Hashimoto, Shigeya Kimura, Jongil Hwang, Hiroshi Katsuno, Shinji Saito, Shinya Nunoue
  • Patent number: 9196786
    Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer and a light emitting layer. The p-type semiconductor layer includes a first p-side layer of Alx1Ga1?x1N (0?x1<1) including Mg, a second p-side layer of Alx2Ga1?x2N (0<x2<1) including Mg and a third p-side layer of Alx3Ga1?x3N (x2<x3<1) including Mg. The light emitting layer is provided between the n-type semiconductor layer and the second p-side layer. The light emitting layer includes barrier layers and well layers. Each of the well layers is provided between the barrier layers. A p-side barrier layer of the barrier layers most proximal to the second p-side layer includes a first layer of Alz1Ga1?z1N (0?z1), and a second layer of Alz2Ga1?z2N (z1<z2<x2).
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: November 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Shigeya Kimura, Yoshiyuki Harada, Shinya Nunoue
  • Publication number: 20150325555
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light reflecting layer, first second, third and fourth semiconductor layers, first and second light emitting layers, and a first light transmitting layer. The second semiconductor layer is provided between the first semiconductor layer and the light reflecting layer. The first light emitting layer is provided between the first and second semiconductor layers. The first light transmitting layer is provided between the second semiconductor layer and the light reflecting layer. The third semiconductor layer is provided between the first light transmitting layer and the light reflecting layer. The fourth semiconductor layer is provided between the third semiconductor layer and the light reflecting layer. The second light emitting layer is provided between the third and fourth semiconductor layers. The light reflecting layer is electrically connected to one selected from the third and fourth semiconductor layers.
    Type: Application
    Filed: June 9, 2015
    Publication date: November 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Rei Hashimoto, Shigeya Kimura, Jongil Hwang, Hiroshi Katsuno, Shinji Saito, Shinya Nunoue
  • Publication number: 20150318435
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.
    Type: Application
    Filed: July 13, 2015
    Publication date: November 5, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Yoshiyuki HARADA, Shigeya KIMURA, Hisashi YOSHIDA, Shinya NUNOUE
  • Patent number: 9159878
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first electrode, and a second electrode. The stacked structural body includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting portion. The stacked structural body has a first major surface on a side of the second semiconductor layer. The first electrode is provided on the first semiconductor. The second electrode is provided on the second semiconductor layer. The first electrode includes a first pad portion and a first extending portion that extends from the first pad portion along a first extending direction. The first extending portion includes a first width-increasing portion. A width of the first width-increasing portion along a direction orthogonal to the first extending direction is increased from the first pad portion toward an end of the first extending portion.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: October 13, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Taisuke Sato, Toshihide Ito, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20150270440
    Abstract: According to one embodiment, a semiconductor light emitting element includes a first semiconductor layer, a second semiconductor layer, and a light emitting unit. The first semiconductor layer includes an n-type impurity having a first concentration. The second semiconductor layer includes a p-type impurity. The light emitting unit is provided between the first and second semiconductor layers. The light emitting unit includes a first barrier layer, a second barrier layer provided between the first barrier layer and the second semiconductor layer, a third barrier layer provided between the second barrier layer and the second semiconductor layer, a first well layer provided between the first and second barrier layers, and a second well layer provided between the second and third barrier layers. A plane including a boundary between the first barrier layer and the first well layer intersects a plane including a (0001) plane of the first semiconductor layer.
    Type: Application
    Filed: March 16, 2015
    Publication date: September 24, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Shinya Nunoue
  • Publication number: 20150270445
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Application
    Filed: June 8, 2015
    Publication date: September 24, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Hajime NAGO, Toshiki HIKOSAKA, Shigeya KIMURA, Shinya NUNOUE
  • Patent number: 9142717
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×108 cm?2. The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: September 22, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Patent number: 9136425
    Abstract: A semiconductor light emitting element includes a first substrate, a stacked body, an electrode, and a conductive layer. The first substrate has a first face and a first side face. The first side face intersects the first face. The first substrate includes a plurality of conductive portions and a plurality of insulating portions arranged alternately. The stacked body is aligned with the first substrate. The stacked body includes first and second semiconductor layers and a light emitting layer. The electrode is electrically connected to the first semiconductor layer. The conductive layer is electrically connected to at least one of the conductive portions and the second semiconductor layer. At least one of the insulating portions is disposed between the first side face and a portion of the conductive layer nearest to the first side face.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: September 15, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jumpei Tajima, Shigeya Kimura, Hiroshi Ono, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20150255670
    Abstract: According to one embodiment, the n-side electron barrier layer is provided at a region close to an end of the active layer on the n-type cladding layer side. The region is located within a range of an electron diffusion length from the active layer. The n-side electron barrier layer prevents electrons having energy which is not more than predetermined energy from being injected into the active layer.
    Type: Application
    Filed: July 30, 2014
    Publication date: September 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideto FURUYAMA, Shigeya Kimura
  • Patent number: 9130069
    Abstract: According to one embodiment, a method is disclosed for manufacturing a nitride semiconductor layer. The method can include forming a first nitride semiconductor layer on a substrate in a reactor supplied with a first carrier gas and a first source gas. The first nitride semiconductor layer includes indium. The first carrier gas includes hydrogen supplied into the reactor at a first flow rate and includes nitrogen supplied into the reactor at a second flow rate. The first source gas includes indium and nitrogen and supplied into the reactor at a third flow rate. The first flow rate is not less than 0.07% and not more than 0.15% of a sum of the first flow rate, the second flow rate, and the third flow rate.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Yoshiyuki Harada, Hisashi Yoshida, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20150236197
    Abstract: According to one embodiment, a semiconductor light emitting device includes first and second semiconductor layers, and a light emitting unit. The light emitting unit is provided between the first and second semiconductor layers and includes well layers and barrier layers. The barrier layers include p-side and n-side barrier layers, and a first intermediate barrier layer. The n-side barrier layer is provided between the p-side barrier layer and the first semiconductor layer. The first intermediate barrier layer is provided between the barrier layers. The well layers include p-side and n-side well layers, and a first intermediate well layer. The p-side well layer is provided between the p-side barrier layer and the second semiconductor layer. The n-side well layer is provided between the n-side barrier layer and the first intermediate barrier layer. The first intermediate well layer is provided between the first intermediate barrier layer and the p-side barrier layer.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Shinya NUNOUE
  • Patent number: 9112111
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: August 18, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Yoshiyuki Harada, Shigeya Kimura, Hisashi Yoshida, Shinya Nunoue
  • Publication number: 20150228851
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Application
    Filed: April 24, 2015
    Publication date: August 13, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeya KIMURA, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Patent number: 9093609
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue